Deadlines:
Paper Submission:  December 7, 2016
Completion of First Review:  February 7, 2017
Completion of Final Review: April 7, 2017
Target Publication: June 2017

The Internet of Things (IoT) is now at its onset as a result of a global effort to enable massively distributed integrated circuits and systems with sensing, processing, communication and energy management capabilities (the “IoT nodes”). The vision towards 1 Tera connected IoT nodes poses several challenges in the broad area of circuits and systems, including:
(i) the need for unprecedentedly high energy efficiency and low standby power,
(ii) ultra-low voltage operation and inexpensive resiliency-enhancement techniques,
(iii) very low cost across the entire chain from design to verification, and manufacturing,
(iv) systematic over-design margin elimination from the circuit to the application level,
(v) cyber-security assurance down to single chip level despite highly-constrained resources,
(vi) the need for early extraction of essential information from physical data within the IoT nodes themselves, to enable distributed learning/sensemaking and hence true IoT scalability.

Due to the gargantuan scale of the IoT, the above challenges need to be addressed through holistic approaches that embrace multiple levels of abstraction (verticality) and building blocks of the on-chip sensing/sensemaking chain (transversality). Nowadays, vertical approaches are progressively becoming more customary to exceed the artificial boundaries created by levels of abstraction, and enable advances that transcend their traditional limits. On the other hand, more research is needed to devise transversal methods that leverage the interaction within the sensing/sensemaking chain, from analog interfaces to processing, power delivery, wireless communications and HW/SW-level information security, while expanding into systems, data representation and algorithmic frameworks.

Authors are invited to submit Regular papers following the IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) guidelines, within the remit of this Special Issue call. Topics within the remit of circuits and systems for IoT include (but are not limited to):

• Circuit and system techniques for energy harvesting/delivery/management and tight coupling with analog/processing/communication sub-systems
• Circuits and systems for ultra-low voltage, energy and standby power consumption
• Adaptive and resilient analog and digital techniques for inexpensive counteraction of process/voltage/temperature variations
• Highly power-efficient circuits for wireless communications in IoT
• Energy-quality scalable and approximate circuits and systems for IoT
• Heterogeneous, reconfigurable and other IoT-specific architectures
• Circuit/architecture/system/algorithmic “just-enough” methods for over-design margin elimination at all levels of abstraction through adaptation to application, context, workload and dataset
• Hardware-level security for IoT, from lightweight encryption to “physically unclonable functions” for chip authentication
• System-on-chip design and verification methodologies for IoT
• Circuit and system approaches and implications on data representation and algorithms for IoT
• Circuits, systems and methods for on-chip machine learning and inference
• Emerging technologies for IoT

Submission Guidelines
All submitted manuscripts must
(i) conform to TCAS-I’s formatting requirements and page-count limit (at no more than 14 pages);
(ii) incorporate no less than 50% of new (previously unpublished) material;
(iii) be submitted online at https://mc.manuscriptcentral.com/tcas1.

Please note that you need to select “Special Issue on IoT” when you submit a manuscript to this Special Issue.

Guest Editors
Prof. Massimo Alioto
National University of Singapore (Singapore)
E-mail: malioto@ieee.org

Prof. Edgar Sanchez-Sinencio
Texas A&M University (USA)
e-mail: s-sanchez@tamu.edu

Prof. Alberto Sangiovanni-Vincentelli
University of California at Berkeley (USA)
E-mail: alberto@berkeley.edu