Dear all IEEE members,<\/p>\n
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IEEE Circuits and Systems (CAS) \u00a0Malaysia Chapter are pleased to inform you that a tutorial on\u00a0Computing-in-Memory (CIM) for Energy-Efficient AI Chips\u00a0<\/strong>\u00a0will be organised as follows:<\/p>\n Date:\u00a0 16 November 2018 Synopsis<\/strong><\/p>\n Memory has proven a major bottleneck in the development of energy-efficient chips for IoT and artificial intelligence (AI) applications. Recent volatile and nonvolatile memory (NVM) devices not only serve as memory macros, but also enable the development of nonvolatile logics (nvLogics) and computing-in-memory (CIM) for IoT and AI chips. In this workshop, we will discuss the trend of IoT and AI chips and introduce the concept of memory-centric computing beyond von Neumann structure. The fundamental of memory circuits of SRAM and NVM (MRAM, ReRAM and PCM) will be introduced. Then, we will explore the recent progress and challenges in circuit designs, devices-circuits-interaction, software-hardware-interaction of CIMs for IoT and AI chips.<\/p>\n \u00a0What you will learn<\/strong><\/p>\n Who Should Attend<\/strong><\/p>\n R&D engineers\/researchers involved in memory IC or AI chips designs.<\/p>\n \nCourse Structure<\/strong><\/p>\n Course Instructors : Prof Dr Meng-Fan (Marvin) Chang<\/b><\/p>\n Prof Chang is a full Professor in the Dept. of Electrical Engineering of National Tsing Hua University (NTHU), Taiwan. Prof Chang obtained considerable practical industrial experience before joining NTHU in 2006, having spent more than 10 years working in semiconductor Between 1997 and 2006, Prof Chang worked in the development of SRAM\/ROM\/flash macros\/compilers at Mentor Graphics (New Jersey, US), TSMC (Taiwan), and the Intellectual Property Library Company (Taiwan). His research interests include circuit design for volatile and nonvolatile memory, 3D-memory, nonvolatile and spintronics logics, circuit-device- interactions in non-CMOS devices, memristor circuits, computing-in-memory and neuromorphic circuits for deep learning and artificial intelligent (AI) chips.<\/p>\n Since 2010, Prof Chang has authored and co-authored more than 40 top conference papers (including 14 ISSCC, 15 VLSI Symposia, 8 IEDM, and 5 DAC) as well as 40+ IEEE journal papers and 40+ US patents. He is an associate editor for IEEE TVLSI, and IEEE TCAD. He has been serving on technical program committees for ISSCC, IEDM (Executive committee, Chair of MT sub-committee), DAC, A-SSCC, IEEE CAS Society (Chair Elect of NG-TC), and numerous international conferences. He is a Distinguished Lecturer for IEEE Circuits and Systems Society (CASS) during 2017-2018. He is the recipient of several prestigious national-level awards in Taiwan, including the Outstanding Research Award of MOST-Taiwan, Outstanding Electrical Engineering Professor Award, Ta-You Wu Memorial Award, and Academia Sinica Junior Research Investigators Award.<\/p>\n Registration Fee<\/strong><\/p>\n **Additional cost may incur for customization or extra material request. Course fee is 100% claimable from PSMB (SBL scheme) in accordance to PSMB guidelines.<\/p>\n Program Logistics\u00a0<\/strong><\/p>\n Morning break, lunch and tea break will be provided throughout the course duration. Course Manual and Certificate of Attendance will be provided.<\/p>\n 3 Easy Steps to Register<\/b><\/p>\n
\nTime: 9.00 am – 5.00 pm.
\nVenue: Dream Catcher Consulting Sdn. Bhd, Penang, Malaysia<\/strong><\/p>\n\n
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\ni n d u s t r y.<\/p>\n\n