{"id":130,"date":"2021-07-07T07:49:43","date_gmt":"2021-07-07T07:49:43","guid":{"rendered":"https:\/\/people.utm.my\/nadzir\/?page_id=130"},"modified":"2026-09-29T04:29:23","modified_gmt":"2026-09-29T04:29:23","slug":"students","status":"publish","type":"page","link":"https:\/\/people.utm.my\/nadzir\/students\/","title":{"rendered":"Muhammad Nadzir Marsono — Students and Alumni"},"content":{"rendered":"\n\n\n\n\nMNMarsono: Students<\/title>\n<table style=\"text-align: left;width: 100%;font-family: sans-serif\" border=\"0\" cellpadding=\"2\" cellspacing=\"2\">\n<tbody>\n<tr>\n<td colspan=\"1\" rowspan=\"2\" style=\"vertical-align: top;width: 15%;text-align: center;font-family: sans-serif\"><img decoding=\"async\" alt=\"MNMarsono\" style=\"width: 100%\" src=\"https:\/\/people.utm.my\/nadzir\/wp-content\/uploads\/sites\/2543\/2024\/07\/nadzir-1.jpg\"><\/td>\n<td colspan=\"1\" rowspan=\"1\" style=\"vertical-align: top;width: 85%;font-family: sans-serif\">\nDepartment of Electronic and Computer\nEngineering<br style=\"font-style: italic\">\nFaculty of Electrical\nEngineering<br>\nUniversiti Teknologi Malaysia<br>\n<a href=\"mailto:mnadzir@utm.my\">mnadzir@utm.my<\/a>, <a href=\"mailto:%20nadzir@fke.utm.my\">nadzir@fke.utm.my<\/a><\/td>\n<\/tr>\n<tr>\n<td style=\"vertical-align: top\"><span style=\"font-weight: bold\"><\/span><br>\nI supervise research in computer\narchitecture, embedded systems, VLSI\/SoC design, network-on-chip,\nnetwork processing and related areas of intelligent computing hardware. This research requires understanding of algorithmic-architecture, hardware-software, application and compute platform. <br>\n<br>\n<span style=\"font-family: sans-serif;font-weight: bold\"><\/span><font style=\"font-weight: bold;font-family: sans-serif\"><\/font><font style=\"font-family: sans-serif\">If you\nqualify, please\ncontact me but first check out\nmy <a target=\"home\" href=\"https:\/\/people.utm.my\/nadzir\/research\/\" rel=\"noopener\">\nresearch interests.<\/a>  <\/font><font style=\"font-family: sans-serif\"><span>Due to\nlimitations on grant\nsupport, I am not\nable to provide financial\nsupport for the time being.<\/span><br>\n<br>\n<br style=\"text-decoration: underline\">\n<font><span style=\"font-weight: bold\">CURRENT\nPOSTDOC\/STUDENTS<\/span><\/font><\/font>\n<p style=\"text-align: justify;font-family: sans-serif;margin-bottom: 0px\"><strong>Ph.D.\n<br>\n<\/strong><\/p>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<ol style=\"text-align: justify;font-family: sans-serif\">\n<li><span style=\"font-weight: bold\">Ali Haider Mohammed Al\nAmmari<\/span>, <span> <\/span><span>thesis\ntopic: Adaptive Micro Network Function for Industrial\nInternet-of-Things <\/span>(October 2023 — )<br>\n<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Zhang Sujia<\/span>, as\nco-supervisor, (main supervisor: Zairi Ismael Rizman, UiTM, other\nco-supervisor Ihsan Mohd Yassin and Zhijin Guan), thesis topic:\nTransformation and Optimization for Quantum Circuits, (April 2023 — )<br>\n<span><\/span><span><\/span><\/li>\n<li><span><b>Izam Kamisian<\/b>, co-supervised by\nNorlina\nParaman, Muhammad Afiq Nuruddin Hamzah and Jamaluddin Zakaria, thesis\ntopic: \nStochastic Compute Architecture (October 2021 — )<br>\n<\/span><\/li>\n<li><span><b>Hala Sirelkhatim Suliman<\/b>, co-supervised by\nShahidatulsadiah Abd Manan, thesis topic:  Traffic Steering in\nService Function Chaining (Feb 2019 — )<\/span><\/li>\n<li><span><span style=\"font-weight: bold\">Entisar Hassan\nKhalifa Osman<\/span>, co-supervised by Usman Ullah Sheikh. Thesis\ntopic: Multispectral Time Series Network Traffic Metrics Forecasting\nfor Software Defined Network Adaptive Routing (September 2016\n–).    <br>\n<\/span><\/li>\n<\/ol>\n<br>\n<p style=\"text-align: justify;font-family: sans-serif;margin-bottom: 0px\"><font style=\"font-family: sans-serif\"><font><span style=\"font-weight: bold\">OUR\nGRADUATES<\/span><\/font><\/font><br>\n<strong>Post-doctoral<br>\n<\/strong><\/p>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<ol style=\"text-align: justify;font-family: sans-serif\">\n<li><span style=\"font-weight: bold\"><\/span><span style=\"font-weight: bold\">Mohammed Sultan Ahmed\nMohammed, Ph.D. <\/span>Post-doc title: <span style=\"font-style: italic\">Task Migration\nOptimization for Improved Dark Silicon 3D Many-Core System Performance\nUnder Thermal Constraint<\/span> (July 2022 — June 2024) <br>\n<\/li>\n<li><strong><span style=\"font-weight: normal\"><span style=\"font-weight: bold\">Mosab\nHamdan Adam Mohamed AlHassan, Ph.D<\/span>.\nPost-doc topic: <\/span><\/strong><span style=\"font-style: italic\"><\/span><strong style=\"font-weight: normal\"><span style=\"font-weight: normal\"><\/span><\/strong><span style=\"font-style: italic\">Load\nBalancing\nTechnique on Multi-Controller <\/span><strong style=\"font-weight: normal\"><span style=\"font-weight: normal\"><\/span><\/strong><span style=\"font-style: italic\">Software-Defined Networks<\/span><strong><span style=\"font-weight: normal\"> (July 2021 \u2013 January 2022)<span style=\"font-weight: bold\"><br>\n<\/span><\/span><\/strong><\/li>\n<li><strong><span style=\"font-weight: normal\"><span style=\"font-weight: bold\">Hau Yuan Wen, Ph.D.<\/span>, <\/span><\/strong>Main\nsupervisor: Mohamed Khalil Hani, Also c<strong><span style=\"font-weight: normal\">o-supervised by Ooi Chia Yee.\nPost-doctoral topic:  <span style=\"font-style: italic\">Multi-processor\nSystem-on-Chip On-Chip Communication ESL Modelling<\/span>,\n(August\n2010\u2013July 2011)<\/span><\/strong><\/li>\n<\/ol>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<p style=\"text-align: justify;font-family: sans-serif;margin-bottom: 0px\"><strong>Doctor\nof Philosophy <br>\n<\/strong><\/p>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<ol style=\"text-align: justify;font-family: sans-serif\">\n<li><span><b>Muhammad Nor Azzafri Bin Nor Azman<\/b>,\n<\/span><span>co-supervised by Usman Ullah Sheikh and Jeevan\nSirkunan, <\/span><span>thesis\ntopic:  Correlation-Aware Model Compression and Adaptive\nProcessing-in-Memory Offloading for Accelerating Intelligence on Edge\n(July 2026).<\/span><\/li>\n<li><span><b>Usman Humayun<\/b>, co-supervised by Ismahani\nIsmail. Thesis title: Improved Flow Table Management for\nSoftware-Define Networks Using Dynamic Timeout with Proactive Eviction\n(October 2025).<\/span><\/li>\n<li><span><b>Muhammad Arif Hakimi Zamrai<\/b>. As co-supervisor,\nmain supervisor: Kamaludin Mohd Yusof<\/span><span>. Thesis title:<\/span><span>\nMitigation of Distributed Denial-of-Service Attack in Software-Defined\nNetwork in Internet-of-Vehicle (July 2025).<\/span><\/li>\n<li><span><b>Fasiku Ayodeji Ireti<\/b>, co-supervised by Mohd\nShahrizal Rusli, thesis title: Traffic-Aware Medium Access Mechanism of\nWireless Network-on-Chip <\/span><span> (June 2023).<\/span><\/li>\n<li><span><b>Omer Elsier Tayfour<\/b>,\nco-supervised by\nAbdul-malik Haider Yusef Saad. Thesis title: Collaborative Detection\nand Mitigation of Distributed Denial-of-Service Attacks in\nSoftware-Defined Networks (June 2023 ).<\/span><\/li>\n<li><span><\/span><span><b>Asrani Lit<\/b>, co-supervised by\nMohd Shahrizal\nRusli. Thesis title: Distance-Aware Bidirectional Medium Access Control\nfor Mesh Wireless Network-on-Chip Architecture (August 2022). <\/span><span><\/span><\/li>\n<li><span><\/span><span><b>Jeevan Sirkunan<\/b>,\nco-supervised by Nasir Shaikh\nHusin. Thesis title: Interleaved Incremental-Decremental Support Vector\nMachine for Embedded Applications (July 2022).<\/span><span><b><br>\n<\/b><\/span><\/li>\n<li><span><b>Muhammad Idrees Masud<\/b>, <\/span><span>co-supervised\nby Nasir Shaik\nHusin and Iqbal A Khan<\/span><span>. Thesis title: <span style=\"font-style: italic\">Realization of Analog Signal Processing\nModules Using Carbon Nanotube Field Effect Transistors <\/span>(June\n2022).<b> <\/b><\/span><\/li>\n<li><span><b>Tan Tze Hon<\/b>, co-supervised by Ooi Chia Yee.\nThesis title: <span style=\"font-style: italic\">A Field-Programmable\nGate Array-based Fog Node\nArchitecture with Reconfigurable Application Plane<\/span> (March 2022)<b>.\n<\/b><\/span><br>\n<\/li>\n<li><span style=\"font-weight: bold\">Mohammed Sultan Ahmed\nMohammed. <\/span>Co-supervised by Norlina Paraman, Ab Al-Hadi Ab\nRahman. Thesis title: <span style=\"font-style: italic\">Task Migration\nOptimization for Improved Dark Silicon Many-Core System Performance\nUnder Thermal Constraint<\/span> (January 2022)  <\/li>\n<li><span style=\"font-weight: bold\">Mosab\nHamdan Adam Mohamed\nAlHassan<\/span>.<span style=\"font-weight: bold\"> <\/span>Thesis\ntopic: <span style=\"font-style: italic\">Enhanced Load\nBalancing\nTechnique Based on Detection and Rerouting of Elephant Flows in\nSoftware-Defined Networks <\/span>(February 2021)<\/li>\n<li><span style=\"font-weight: bold\">Paulson\nEberechukwu Numan<\/span>.\nAs co-supervisor. Main supervisor: Kamaludin Mohamad Yusof. Thesis\ntitle: <span style=\"font-style: italic\">Optimal\nController Placement\nAlgorithm for Software-Defined Internet-of-Things Networks <\/span>(October\n2020)<\/li>\n<li><span style=\"font-weight: bold\">Bushra\nM. Ali<\/span>.\nCo-supervised by Ismahani Ismail. Thesis topic: <span style=\"font-style: italic\">Improved Statistical Flow\nFeature\nSelection for Heavy-Bandwidth On-line Traffic Classification <\/span>(March\n2020)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Tang\nJia Wei<\/span>.<span style=\"font-weight: bold\"> <\/span>Co-supervised\nby Hau Yuan Wen. Thesis title<span style=\"font-weight: bold\">: <\/span><span style=\"font-style: italic\">An\nEffective Application Mapping Design Environment for Multiprocessor\nSystem-on-Chip Using Network-on-Chip Communication Delay Model<\/span>\n(July 2018)<span style=\"font-weight: bold\"><br>\n<\/span><\/li>\n<li><span style=\"font-weight: bold\"><\/span><span style=\"font-weight: bold\">Loo Hui Ru. <\/span>Thesis\ntitle: <span style=\"font-style: italic\">Incremental\nSemi-Supervised Approach for\nHigh Throughput Network Traffic Classification<\/span>(October\n2017)<\/li>\n<li><span style=\"font-weight: bold\">Stephen\nJoseph Bassi. <\/span>Co-supervised\nby Ismahani Ismail. Thesis title: <span style=\"font-style: italic\">Network\nTraffic Classification with Coorperative Learning for Distributed\nNetwork Monitoring  <\/span>(<span style=\"font-weight: bold\"><\/span>June\n2017)<\/li>\n<li><span style=\"font-weight: bold\">Mehdi\nBaboli.<\/span> As\nco-supervisor. Main supervisor: Nasir Shaikh Husin. Thesis title: <span style=\"font-style: italic\">Clustered Two Dimensional Mesh\nTopology\nfor Large-Scale Network-on-Chip Architecture<\/span> (June 2017)<br>\n<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Lee Yee\nHui<\/span>..<span style=\"font-weight: bold\"> <\/span>As\nco-supervisor. Main supervisor:\nMohamed Khalil Hani. Thesis topic: <span style=\"font-style: italic\">Quantum\nComputing Modelling on Field Programmable Gate Array Based on State\nVector and Heisenberg Models<\/span> (March 2017)<br>\n<strong><\/strong><em><\/em><span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Ban\nMohammed Khammas<\/span>.<span style=\"font-weight: bold\"> <\/span>Co-supervised\nby Ismahani\nIsmail. Thesis topic: <span style=\"font-style: italic\">Network\nLevel\nMalware Detection Based on Packet Payload Classification<\/span>\n(January 2017)<\/li>\n<li><span style=\"font-weight: bold\">Alireza\nMonemi. <\/span>Co-supervised\nby Ooi Chia Yee. Thesis topic: <span style=\"font-style: italic\">An\nEnhanced Low Latency Network-on-Chip Router Optimized for Prototyping\non Field Programmable Gate Array<\/span><span style=\"font-style: italic\">\n<\/span>(December 2016)<\/li>\n<li><span style=\"font-weight: bold\">Mohd\nShahrizal Rusli. <\/span>Co-supervised\nby Maurizio Palesi. Thesis topic:<span style=\"font-style: italic\">\nAdaptive Transmission Power and Run-Time Packet Relocation in Wireless\nNetwork-on-Chip, <\/span><span style=\"font-style: italic\"><\/span>(June\n2016)<\/li>\n<li><span style=\"font-weight: bold\">Haitham\nAhmad Jamil\nMohammed, Ph.D<\/span>. As co-supervisor. Main supervisor:\nSulaiman Mohd\nNor. Thesis title: Flow-based Machine Learning Classifier for Life\nPeer-to-Peer Traffic Detection, (January 2015) <span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Aliyu\nMohammed, Ph.D. <\/span>As\nco-supervisor. Main supervisor: Sulaiman Mohd Nor. Thesis title: <span style=\"font-style: italic\">Risk Analysis of Malware in\nCampus Network\nbased on Bayesian Belief System<\/span>, (May 2014)<\/li>\n<li><span style=\"font-weight: bold\">Ismahani\nIsmail<\/span>,\nPh.D. As co-supervisor. Main supervisor: Sulaiman Mohd Nor. Thesis\ntitle: <span style=\"font-style: italic\">Naive Bayes\nClassification\nwith Domain Knowledge for New Malware Variants and Stateless Packet\nLevel Detections<\/span>, (August 2013)  <br>\n<\/li>\n<li><span style=\"font-weight: bold\">Vishnu\nP. Nambiar<\/span>,\nPh.D. As co-supervisor. Main supervisor: Mohamed Khalil Hani. Thesis\ntitle: <span style=\"font-style: italic\">An Evolvable\nBlock-Based\nNeural Network Architecture for Embedded Hardware<\/span>, (June\n2013)<\/li>\n<\/ol>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<p style=\"text-align: justify;font-family: sans-serif;margin-bottom: 0px\"><strong>Master\nof Philosophy (by Research)<\/strong><\/p>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<ol style=\"text-align: justify;font-family: sans-serif\">\n<li><span style=\"font-weight: bold\">Ahmed Abdelsalam Mohamed\nKheir Abuelgasim<\/span>. As co-supervisor. Main supervisor: Kamaludin\nMohamad Yusof. Thesis topic: <span style=\"font-style: italic\">Mobility\nManagement for Heterogeneous Long Term Evolution Mobile Networks Based\non Drive Test Measurement<\/span> \n(February 2022).<\/li>\n<li><span style=\"font-weight: bold\">Mahdieh\nNadi Senejani<\/span>.\nCo-supervised by Ooi Chia Yee. Thesis title: <span style=\"font-style: italic\">Architecture-Level\nPower-Time-Area\nEstimators for IEEE 1149.1 Structure in Testing Interconnect Resources\nof Network-on-Chip  <\/span><span style=\"font-style: italic\"><\/span>\n(December 2018).<\/li>\n<li><span style=\"font-weight: bold\">Jeevan\nSirkunan. <\/span>Co-supervised\nby Ooi Chia Yee. Thesis title: <span style=\"font-style: italic\">Hardware\nTransactional <\/span><span style=\"font-style: italic\">Memory\nwith\nConfigurable Version Management for Multi-Processor Programmable\nPlatforms<\/span> (July 2015).<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Loo\nLing Kim. <\/span>Thesis\ntitle: <span style=\"font-style: italic\">Adaptive Online\nFault\nDetection on Network-on-Chip Based on Packet Logging Mechanism<\/span>\n(April 2015)<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Tan Tze\nHon. <\/span>Co-supervised\nby Ooi Chia Yee. Thesis title <span style=\"font-style: italic\">Remote\nRun-Time Reconfigurable <\/span><span style=\"font-style: italic\">Middlebox\non NetFPGA<\/span> (February 2015)<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Ahmad\nFaisal Adnan<\/span>.\nCo-supervise with Abu Khari A\u2019ain. Thesis title: <span style=\"font-style: italic\">Systematic Tuning Procedure for\nAnalog\nDesign Reuse Methodology <\/span>(October 2013)<br>\n<strong><\/strong><\/li>\n<li><strong>Yuzman Yusoff<\/strong>, M.Eng\n(Electrical Eng.)\nwith MIMOS. Co-supervised by Shahiman Sulaiman. Thesis title <em>A\nLow\nPower 10-bit 50MS\/s Pipelined Analog-to-Digital Converter<\/em>\n(August\n2010)<span style=\"font-weight: bold\"><\/span>.<\/li>\n<\/ol>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<p style=\"text-align: justify;font-family: sans-serif;margin-bottom: 0px\"><strong>Master\nof Engineering Projects (by Taughtcourse) <\/strong><\/p>\n<div style=\"text-align: justify;font-family: sans-serif\"> <\/div>\n<ol style=\"font-family: sans-serif\">\n<li><span style=\"font-weight: bold\">Ong Chun Foong<\/span>, M.\nEng.\n(Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Heterogeneous Manycore Hardware\nArchitecture with Linear Algebra Acceleration<\/span> (February 2023)<\/li>\n<li><span style=\"font-weight: bold\">Ng Wai Kin<\/span>, M. Eng.\n(Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Area-Optimal Cache Coherent\nProtocol for Many-Core Network-on-Chip System<\/span> (July 2022)<\/li>\n<li><span style=\"font-weight: bold\">Lim Wei Fang<\/span>, M.\nEng. (Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Hardware Acceleration of K-Mean Support\nVector Machine Classifier for Tongue Diagnosis<\/span> (February 2022)<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Ooi Tze Kian<\/span>, M.\nEng. (Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Hardware\/Software Co-Design of Two-Stage\nSmart Arrhythmia Classifier Based on Multi-Processor Field Programmable\nGate Array System-On-Chip<\/span> (February 2022)<\/li>\n<li><span style=\"font-weight: bold\">Elaine Ong Ei Ling<\/span>,\nM. Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Hash\nFunction of Cryptographically Secure\nPseudorandom Number Generator for Hardware Root-of-Trust <\/span>(July\n2021) <br>\n<\/li>\n<li><span style=\"font-weight: bold\">Siti Nadhirah Zainurin<\/span>,\nM. Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Low\nLatency Cipher for Hardware-Based Memory\nProtection Unit for Application in System-on-Chip Root-of-Trust<\/span>\n(February1 2021)<\/li>\n<li><span style=\"font-weight: bold\">Ng Lai Boon<\/span>, M.Eng.\n(Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">Hardware\nAcceleration of Secure Hash\nAlgorithm 3<\/span> (January 2020)<\/li>\n<li><span style=\"font-weight: bold\">Goh Jinn Chyn<\/span>,\nM.Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Convolutional\nand Max Pooling Layer\nAccelerator for Convolutional Neural Network<\/span> (January 2020)<\/li>\n<li><span style=\"font-weight: bold\">Ng Yee Wei<\/span>, M.Eng.\n(Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Principal\nComponent Analysis Hardware\nAcceleration<\/span> (January 2020)<\/li>\n<li><span style=\"font-weight: bold\">Haider Ali<\/span>, M.Eng.\n(Computer & Microelectronic\nSystems) – <span style=\"font-style: italic\">Traffic Classification\nand management based on Flow\nStatistics on NetFPGA<\/span> (June 2018)<\/li>\n<li><span style=\"font-weight: bold\">Marie Micheline Pius<\/span>,\nM.Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Random\nForest Hardware Acceleration using\nFPGA for Prediction<\/span> (June 2018)<\/li>\n<li><span style=\"font-weight: bold\">Ahmad Zulzhafri bin\nMohamad Zuki<\/span>, M.Eng. (Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">FPGA\nImplementation of Naive Bayes\nClassifier for Network Security<\/span> (June 2018)<\/li>\n<li><span style=\"font-weight: bold\">Chai Kah Hieng<\/span>,\nM.Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Hardware\nBased Accelerator for Database\nQuery using M-tree<\/span> (June 2018)<\/li>\n<li><span style=\"font-weight: bold\">Gan Soon Jin<\/span>. M.\nEng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Hardware\nAcceleration of Lightweighted\nStand-Alone Internet Protocol Security on Field-Programmable Gate Array<\/span>\n(June 2017)<\/li>\n<li><span style=\"font-weight: bold\">Nasiruddin Nasirin<\/span>.\nM. Eng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Resource-Efficient\nEmbedded Neural Network\non Field Programmable Gate Array<\/span> (June 2017)<\/li>\n<li><span style=\"font-weight: bold\">Ng Shao Kay<\/span>. M.\nEng. (Computer & Microelectronic\nSystems) – <span style=\"font-style: italic\">Random-Access Memory\nBased Ternary Content Addressable\nMemory with Field Programmable Gate Array<\/span> (June 2017)<\/li>\n<li><span style=\"font-weight: bold\">Tey Seng Rou<\/span>. M.\nEng. (Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Multi-Class\nSupport Vector Machines Network\nTraffic Classifier<\/span> (June 2017)<\/li>\n<li><span style=\"font-weight: bold\">Prak Yut a\/l Ee Luan<\/span>,\nM. Eng. (Electrical – Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">Adaptive\nProportional-Integral-Derivative Controller on Field Programmable Gate\nArray<\/span> (July 2016)<\/li>\n<li><span style=\"font-weight: bold\">Chew Yen Wen<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">8192-Bit\nRivest-Shamir-Adleman Data\nEncryption Hardware<\/span> (January 2016)<\/li>\n<li><span style=\"font-weight: bold\">Vincent Tan Chee Wei<\/span>,\nM. Eng. (Electrical – Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">Network-on-Chip\nFloorplanning and\nApplication Mapping Using the Cross Entropy Method<\/span> (June 2015)<\/li>\n<li><span style=\"font-weight: bold\">Zulkifli Yusof<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Field\nProgrammable Gate Array Architecture\nof Proportional-Integral-Derivative Controller <\/span>(June 2015)<\/li>\n<li><span style=\"font-weight: bold\">Ong Chin Tong<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Block-based\nNeural Network Mapping on\nGraphic Processor<\/span> (June 2015)<\/li>\n<li><span style=\"font-weight: bold\">Teo Hong Yap<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Hardware\/Software\nSystem-on-Chip\nCo-Verification Platform Based on Logic-Based Environment for\nApplication Programming Interfacing<\/span> (June 2015)<\/li>\n<li><span style=\"font-weight: bold\">Kelvin Quok Wei Luo<\/span>,\nM. Eng. (Electrical – Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">Traffic\nSignage Detection and\nRecognition Based on k-means Clustering and Support Vector Machine\nClassification<\/span> (January 2015)<\/li>\n<li><span style=\"font-weight: bold\">Chin Teck Loong<\/span>, M.\nEng. (Electrical – Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">Hardware-Accelerated\nLocalization for\nAutomated License Plate Recognition System<\/span> (January 2015)<\/li>\n<li><span style=\"font-weight: bold\">Wan Mohd Amir Harris Bin\nWan Sallehuddin<\/span>, M. Eng.\n(Electrical – Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Network-on-Chip\nFault Detecti on and Router Self-Test<\/span> (January 2015)<\/li>\n<li><span style=\"font-weight: bold\">Kamarul Ariffin Kasmiran<\/span>,\nM. Eng.\n(Electrical – Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Embedded Local\nContrast Image Enhancement Processing on Field Programmable Gate Array<\/span>\n(June 2014)<\/li>\n<li><span style=\"font-weight: bold\">Ng Keng Yoke<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">AMBA AXI\nBus to Network-on-Chip Bridge<\/span> (June\n2013)<\/li>\n<li><span style=\"font-weight: bold\">Lisa Chu<\/span>, M. Eng.\n(Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Hardware\nArchitecture of Histogram of\nOriented Gradients<\/span> (January 2013)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Ang Boon Hui<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Architecture\nof 2D Discrete Wavelet\nTransform<\/span> (July 2012)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Gan Chong Gim<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Content\nAddressable Memory Architecture<\/span>\n(July 2012)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Chia Ie Chien<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Network-on-Chip\nPlacement and Mapping<\/span> (July\n2012)            <br>\n<\/li>\n<li><span style=\"font-weight: bold\">Choo Kok Yang<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Fast\nNeural Network Processor<\/span> (July 2012)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Abbas Hagi<\/span>, M. Eng.\n(Electrical – Microelectronic\n& Computer Systems) – <span style=\"font-style: italic\">Image\nProcessing Architecture<\/span> (July\n2012)       <br>\n<\/li>\n<li><span style=\"font-weight: bold\">Hamed Shariffar<\/span>, M.\nEng. (Electrical – Electronic\n& Telecommunication) – <span style=\"font-style: italic\">Network\nProcessing Instruction Set Extension<\/span>\n(January 2012)<\/li>\n<li><span style=\"font-weight: bold\">Roozbeh Zaraei<\/span>, M.\nEng. (Electrical – Electronic\n& Telecommunication) – <span style=\"font-style: italic\">Online\nPeer-to-Peer Traffic Classification<\/span>\n(January 2012)<\/li>\n<li><span style=\"font-weight: bold\">Muhidin Abdullahi Mohamed<\/span>,\nM. Eng. (Electrical –\nElectronic & Telecommunication) – <span style=\"font-style: italic\">Analytical\nModel for Peer-to-peer\nOutbound Flow Control<\/span> (May 2011)<\/li>\n<li><span style=\"font-weight: bold\">Asrani Lit<\/span>, M. Eng.\n(Electrical – Computer &\nMicroelectronic Systems) –<span style=\"font-style: italic\"> NoC\nNetwork Partitioning and IP Placement<\/span>\n(May 2011)<\/li>\n<li><span style=\"font-weight: bold\">Wang Hsin Wey<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Wormhole\nRouter and Network Adapter\nArchitectures Supporting Virtual Circuit Connectivity<\/span> (May 2011)<\/li>\n<li><span style=\"font-weight: bold\">Gwee Yong Chun<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">NoC\nRouter Supporting Routing Adaptivity<\/span>\n(May 2011)<\/li>\n<li><span style=\"font-weight: bold\">Mohammad Imaaduddin\nMohammad Zaki<\/span>, M. Eng.\n(Electrical – Computer & Microelectronic Systems) – <span style=\"font-style: italic\">Embedded\nProcessor Instruction Set Customization for Network Processing: A Case\nof Nios II<\/span> (May 2011)<br>\n<\/li>\n<li><span style=\"font-weight: bold\">Ee Sze Hui<\/span>, M. Eng.\n(Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">NoC\nPrototyping and Emulation<\/span> (May 2011)<\/li>\n<li><span style=\"font-weight: bold\">Alireza Monemi<\/span>, M.\nEng. (Electrical – Electronic\n& Telecommunication) – <span style=\"font-style: italic\">IP\nWrapper and Layer-3 Spam Fingerprinting<\/span>\n(November 2010)<\/li>\n<li><span style=\"font-weight: bold\">Mussab Mustafa Hassan<\/span>,\nM. Eng. (Electrical –\nElectronic & Telecommunication) – <span style=\"font-style: italic\">A\nHybrid Heuristic and\nStatistical P2P Classification<\/span> (July 2010)<\/li>\n<li><span style=\"font-weight: bold\">Tay Huey Fen<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">NoC\nPrototyping and Traffic Generation<\/span> (May\n2010)<\/li>\n<li><span style=\"font-weight: bold\">Mohd Syafiq Mispan<\/span>,\nM. Eng. (Electrical – Computer\n& Microelectronic Systems) – <span style=\"font-style: italic\">NoC\nTest Packet Scheduling<\/span> (May 2010)<\/li>\n<li><span style=\"font-weight: bold\">Zatul Iradah Mahid<\/span>,\nM Eng (Electrical – Electronics\n& Telecommunications) – <span style=\"font-style: italic\">Packet-level\nSpam Fingerprinting<\/span> (May 2010)<\/li>\n<li><span style=\"font-weight: bold\">Lee Cheen Kok<\/span>, M.\nEng. (Electrical – Computer &\nMicroelectronic Systems) – <span style=\"font-style: italic\">Development\nof a Wormhole Router for\nNetwork-on-Chip<\/span> (November 2009)<\/li>\n<li><span style=\"font-weight: bold\">Mohd Farhan Shaari<\/span>,\nM. Eng. (Electrical – Computer\n& Microelectronic Systems) <span style=\"font-style: italic\">Network\nAdapter for Network-on-Chip<\/span>\n(November 2009)<\/li>\n<li><span style=\"font-weight: bold\">Hanieh Rajabi<\/span>, M\nEng (Electrical – Electronics &\nTelecommunications) – <span style=\"font-style: italic\">A Behavioural\nApproach to Rapid Malcode Signature\nGeneration<\/span> (November 2009)<\/li>\n<li><span style=\"font-weight: bold\">Mohamad Sour Palut<\/span>,\nM Eng (Electrical – Electronics\n& Telecommunications) – <span style=\"font-style: italic\">A\nHardware Aarchitecture of Gaussian Filter\nfor Digital Image Processing<\/span> (November 2009)<\/li>\n<li><span style=\"font-weight: bold\">Aramesh Seif<\/span>, M Eng\n(Electrical – Electronics &\nTelecommunications) – <span style=\"font-style: italic\">A Hardware\nAarchitecture of Prewitt Edge\nDetection<\/span> (November 2009)<\/li>\n<li><span style=\"font-weight: bold\">Siti Aisah Mat Junos @\nYunos<\/span>, M Eng (Electrical –\nElectronics & Telecommunications) – <span style=\"font-style: italic\">Network-on-Chip Mesh Topology\nModeling and Performance Analysis<\/span> (May 2009)<\/li>\n<li><span style=\"font-weight: bold\">R Selvakumar Rajagopal<\/span>,\nM. Eng. (Electrical –\nComputer & Microelectronic Systems) – <span style=\"font-style: italic\">Testing and Debugging\nMechanisms for Network-on-Chip <\/span>(May 2009)<span style=\"font-weight: bold\"><\/span><\/li>\n<li><span style=\"font-weight: bold\">Rami Eltilib<\/span>, M Eng\n(Electrical — Electronics &\nTelecommunications) – <span style=\"font-style: italic\">Packet-Level\nIntrusion Detection<\/span> (May 2009)<\/li>\n<li><span style=\"font-weight: bold\">Fazlida Dahalan<\/span>, M.\nEng. (Electrical — Electronics\n& Telecommunications) – <span style=\"font-style: italic\">Packet-Level\nSpam Fingerprinting<\/span> (May 2009)\n<\/li>\n<\/ol>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<br>\n<br>\n\n\n\n\n","protected":false},"excerpt":{"rendered":"<p>MNMarsono: Students Department of Electronic and Computer Engineering Faculty of Electrical Engineering Universiti Teknologi Malaysia mnadzir@utm.my, nadzir@fke.utm.my I supervise research in computer architecture, embedded systems, VLSI\/SoC design, network-on-chip, network processing and related areas of intelligent computing hardware. This research requires understanding of algorithmic-architecture, hardware-software, application and compute platform. If you qualify, please contact me but […]<\/p>\n","protected":false},"author":25399,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-130","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/pages\/130","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/users\/25399"}],"replies":[{"embeddable":true,"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/comments?post=130"}],"version-history":[{"count":59,"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/pages\/130\/revisions"}],"predecessor-version":[{"id":539,"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/pages\/130\/revisions\/539"}],"wp:attachment":[{"href":"https:\/\/people.utm.my\/nadzir\/wp-json\/wp\/v2\/media?parent=130"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}