FORTE 2016 Call for Papers

36th IFIP International Conference on Formal Techniques for Distributed Objects, Components and Systems

http://forte2016.discotec.org

Part of the DisCoTec 2016 event

http://2016.discotec.org/index.php

6-9 June 2016, Aquila Atlantis Hotel, Heraklion, Crete

FORTE 2016 is a forum for fundamental research on theory, models,

tools, and applications for distributed systems. The conference

solicits original contributions that advance the science and

technologies for distributed systems, with special interest in the

areas of:

– service-oriented, ubiquitous, pervasive, grid, cloud, and mobile

computing systems;

– object technology, modularity, component- and model-based design;

– software reliability, availability, and safety;

– security, privacy, and trust in distributed systems;

– adaptive distributed systems, self-stabilization;

– self-healing/organizing;

– verification, validation, formal analysis, and testing of the above.

Contributions that combine theory and practice and that exploit formal

methods and theoretical foundations to present novel solutions to

problems arising from the development of distributed systems are

encouraged. FORTE covers distributed computing models and formal

specification, testing and verification methods. The application

domains include all kinds of application-level distributed systems,

telecommunication services, Internet, embedded and real-time systems,

as well as networking and communication security and reliability.

Main topics of interest

Topics of interest include but are not limited to:

– Languages and semantic foundations: new modeling and language

concepts for distribution and concurrency, semantics for different

types of languages, including programming languages, modeling

languages, and domain-specific languages; real-time and probability

aspects;

– Formal methods and techniques: design, specification, analysis,

verification, validation, testing and runtime verification of

various types of distributed systems including communications and

network protocols, service-oriented systems, adaptive distributed

systems, cyber-physical systems and sensor networks;

– Foundations of security: new principles for qualitative and

quantitative security analysis of distributed systems, including

formal models based on probabilistic concepts;

– Applications of formal methods: applying formal methods and

techniques for studying quality, reliability, availability, and

safety of distributed systems;

– Practical experience with formal methods: industrial applications,

case studies and software tools for applying formal methods and

description techniques to the development and analysis of real

distributed systems.

Important dates:

Abstract submission: February 1, 2016​

Paper submission: February 8, 2016

Notification of acceptance: March 21, 2016

Camera-ready version: April 4, 2016

Early registration: May 9, 2016

Conference and workshops: June 6-9, 2016

Invited speaker

Catuscia Palamidessi (INRIA, France)

Submission and publication

Contributions must be written in English and report on original,

unpublished work, not submitted for publication elsewhere (cf. IFIP’s

codes of conduct). The submissions must be prepared using Springer’s

LNCS style. Submissions not adhering to the specified constraints may

be rejected without review. Papers can be submitted electronically in

pdf via the FORTE’16 interface of the EasyChair system.

We solicit four kinds of submissions:

– Full papers (up to 15 pages): Describing thorough and complete

research results, tools or experience reports.

– Short papers (up to 7 pages): Describing research results that are

not fully developed, or manifestos, calls to action, personal views

on FORTE related research, on the current state of the art, or on

prospects for the years to come.

– Tool demonstration papers (up to 7 pages): focus on the usage

aspects of tools. Theoretical foundations and experimental

evaluation are not required, however, a motivation as to why the

tool is interesting and significant should be provided. Papers may

have an appendix of up to 5 additional pages with details on the

actual demonstration.

– Posters (up to 3 pages): Students can submit descriptions of posters

that will be presented at the conference during a students poster

session. Neither the descriptions or the posters will be published

in the proceedings.

Each paper will undergo a peer review of at least 3 anonymous

reviewers. The conference proceedings will be published by Springer in

the LNCS Series. The best papers will be invited after the conference

to contribute to a special issue of a top-level journal.

Program Committee Chairs

Elvira Albert, Complutense University of Madrid, Spain

Ivan Lanese, University of Bologna/INRIA, Italy

Program Committee

Erika Abraham, RWTH Aachen University, Germany

Gul Agha, University of Illinois at Urbana-Champaign, USA

Ahmed Bouajjani, LIAFA, University Paris Diderot, France

Frank De Boer, CWI, the Netherlands

Lars-Ake Fredlund, Universidad Politécnica de Madrid, Spain

David Frutos Escrig, Universidad Complutense, Spain

Stefania Gnesi, ISTI-CNR, Italy

Kim Guldstrand Larsen, Aalborg University, Denmark

Bart Jacobs, Katholieke Universiteit Leuven, Belgium

Einar Broch Johnsen, University of Oslo, Norway

Antónia Lopes, University of Lisbon, Portugal

Massimo Merro, University of Verona, Italy

Peter Olveczky, University of Oslo, Norway

Luca Padovani, Università di Torino, Italy

Anna Philippou, University of Cyprus, Cyprus

Arnd Poetzsch-Heffter, University of Kaiserslautern, Germany

Emilio Tuosto, University of Leicester, UK

Kostis Sagonas, Uppsala University, Sweden

Alexandra Silva, University College London, UK

Jean-Bernard Stefani, INRIA, France

Mahesh Viswanathan, University of Illinois Urbana-Champaign, USA

Call for Papers

DREAMCloud 2016
2nd International Workshop on Dynamic Resource Allocation and Management
in Embedded, High Performance and Cloud Computing

Jan 19th 2016
Co-Located with HiPEAC 2016
Prague, Czech Republic
https://www.hipeac.net/events/activities/7316/dreamcloud/

– Paper submission deadline:  November 20, 2015 (EXTENDED)
Jointly organised by the DreamCloud and EXCESS projects.

——————————————————————————–

DREAMCloud is a workshop aiming to encourage technical and scientific exchanges
between senior academics, young researchers and industrialists in the area of
dynamic resource management in embedded, high performance and cloud computing.
It has strong emphasis on performance predictability and energy
efficiency, which are the key issues addressed by the DreamCloud and
EXCESS projects.
It aims to foster cooperation across the different domains by emphasising the
latest trends bringing together the respective research communities:

– embedded systems are increasingly complex, having to cope with dynamic
workloads, and using multiprocessor and communication-centric platforms, while
fulfiling strict timing and energy requirements;

– high-performance and cloud computing critically need to address fundamental
problems in energy efficiency and performance predictability, despite having
little or no a priori knowledge about their workloads.

The second DREAMCloud Workshop will be co-located with the HiPEAC 2016
Conference in Prague, Czech Republic (https://www.hipeac.net/2016/prague/).

TOPICS OF INTEREST

– dynamic resource allocation and management algorithms and heuristics for
time-predictable and performance-predictable systems

– dynamic resource allocation and management algorithms and heuristics
targeting energy-efficiency

– operating system and virtualisation technologies implementing dynamic
resource allocation and management (task allocation, task migration, context
management)

– dynamic resource allocation of on-chip and off-chip interconnects (routing,
buffer allocation)

– dynamic management of memory hierarchies and storage (time-predictable memory
controllers, scratchpads, file systems)

– dynamic hardware reconfiguration to support dynamic resource management
(hardware-assisted dynamic scheduling and allocation)

– approaches to energy-efficient computing paradigms for emerging many-core
architectures

– energy execution models

– energy-aware compiler optimizations and runtime support

– specification languages and environments (workload characterisation)

– system monitoring (workload monitoring, platform monitoring, energy
monitoring)

– verification and evaluation techniques (simulation, analytical models)

– benchmarks for dynamic resource allocation in embedded, high performance and
cloud computing

The workshop is organised by the EU-funded DreamCloud and EXCESS project
consortia, which have both started in September 2013 and are addressing some
of the topics listed above.
The overall goal of the workshop, however, is to assess the most relevant
research contributions and industrial needs in this area, therefore
contributions from
outside of the consortia are extremely welcome and will be given
preference in the final programme.

IMPORTANT DATES

– Submission: 12th November, 2015, extended to 20th November, 2015
– Notification: 15th December, 2015
– Final Version: 5th January, 2015
– Workshop 19th January, 2016

SUBMISSION

Authors are invited to submit contributions as maximum 8 page papers in IEEE
format. Contribution(s) have to be submitted electronically through EasyChair:
https://easychair.org/conferences/?conf=dreamcloud2016

All accepted papers will be published in arXiv’s Computing Research
Repository (CoRR).

A selection of the best papers may be considered for publication as a journal
special issue after the event.

ORGANISERS

Leandro Soares Indrusiak – University of York, UK
Alexey Cheptsov – High Performance Computing Center Stuttgart (HLRS), DE

Technical Program Committee

Neil Audsley – University of York, UK
Luciano Copello Ost – University of Leicester, UK
Alexey Cheptsov – High Performance Computing Center Stuttgart, DE
Piotr Dziurzanski – University of York, UK
Abdoulaye Gamatie – LIRMM, FR
Christoph Kessler – Linköping University, SE
Amit Kumar Singh – University of York, UK
Borislav Nikolic – Polytechnic Institute of Porto, PT
Raj Patel – RheonMedia, UK
Paul Renoud-Goud, Chalmers University of Technology, SE
Gilles Sassatelli – LIRMM, FR
Fridtjof Siebert – aicas, DE
Bjoern Saballus – Bosch, DE
Leandro Soares Indrusiak – University of York, UK
Philippas Tsigas – Chalmers University of Technology, SE

====================================================================
                             HARSH 2016
    Workshop on Highly-Reliable Power-Efficient Embedded Designs

                          CALL FOR PAPERS
====================================================================
    Our apologies if you receive multiple copies of this message
====================================================================

March 12th 2016, Barcelona (Spain)
In conjunction with HPCA 2016, CGO 2016, and PPoPP 2016

Website: http://www.harsh-workshop.org/

===========================
CALL FOR PAPERS
===========================

HARSH 2016 will provide a unique forum for the discussion of the
challenges in the design and operation of harsh environment-capable
embedded processors.

Nowadays, embedded chips are deployed almost everywhere, from mobile
phones to on-board electronics in automobiles and satellites.
Different from conventional microprocessor designs, the operation
conditions of embedded processors are severely constrained by the
environment. For example, in aerospace applications, the computer
installed on Mars rover "Curiosity" has to tolerate extreme space
radiation and temperatures, operate at low power, and provide enough
computation capability to perform mission-critical tasks. Embedded
designs for Unmanned Aerial Vehicles (UAVs) also encounter extremely
challenging design requirements. Despite their tight power budget,
UAV chips demand significant throughput for real-time high-speed
image processing. In the context of oil and gas exploration and
extraction, embedded processors can be found even on the drill string
itself, to process sensor inputs in real time while withstanding high
temperatures and humidity levels.

To guarantee reliability across these drastically diverse
environments, the design and operation of embedded processors should
not be solely confined to the chip but traverse different layers in
the computing system, involving firmware, operating system,
applications, as well as power management units and communication
interfaces. The goal of HARSH 2016 is to facilitate the exchange of
the latest ideas, insights, and knowledge related to all critical
aspects of new-generation harsh environment-capable embedded
processors, including micro-architectural approaches, cross-stack
hardware/software techniques, and emerging challenges and
opportunities. We hope to attract a group of interdisciplinary
researchers from academia, industry, and government research labs.

In addition to the presentation of selected paper submissions,
keynote speakers will be invited to kick-off the workshop sessions
and a "Best Paper" award will be presented at the conclusion of the
workshop. To encourage discussion between participants, HARSH 2016
will organize dedicated programs for discussion between presenters
and the audience.

===========================
TOPICS
===========================

Topics of interest include but are not limited to:

(1) Architecture design and implementation for highly-reliable
    power-efficient embedded processors:
    - Architectural approaches for reliability assurance under
      very-low power budgets.
    - Availability, soft-error tolerance and recovery issues.
    - Highly-reliable cache/memory hierarchies.
    - Massive heterogeneous processing capabilities.
    - Power management techniques.
    - Very-low power, reliable real-time processing.
    - Specialized accelerator architectures and unique designs.
    - Reusable and/or reconfigurable embedded designs.
    - Packaging and cooling.

(2) Cross-stack hardware/software techniques:
    - Cross-stack approaches for reliability assurance under
      very-low power budgets.
    - Reliability- and power-aware operating systems, compilers,
      workload managers, firmware and other software.
    - Workload analysis and optimization for reliable low-power
      embedded systems.

(3) Applications:
    - Aerospace: unmanned aerial vehicles (UAVs), planetary rovers
      and space probes, satellites, avionic systems, etc.
    - Medical support: lifesaving monitors, portable medical devices,
      high-end imaging systems, etc.
    - Oil and gas exploration and extraction: unmanned underwater
      vehicles (UUVs), measurement while drilling (MWD), logging
      while drilling (LWD), etc.
    - Aerial surveillance.
    - Disaster search, rescue, and relief.
    - Novel applications for highly-reliable low-power embedded
      chips.

===========================
SUBMISSIONS
===========================

Papers reporting original research results pertaining to the above
and related topics are solicited. Full paper manuscripts must be in
English of up to 6 pages (using the IEEE two-column format). The
on-line submission site is EasyChair. If web submission is not
possible, please contact the program co-chairs for alternate
arrangements.

To submit regular papers to the workshop, please visit:
http://www.harsh-workshop.org/submissions

If you have questions regarding submission, please contact us:
info@harsh-workshop.org

Important Dates:

  - Submission deadline: Jan 22, 2016
  - Notification of acceptance: Feb 8, 2016
  - Final paper submission: Feb 26, 2016
  - Workshop date: Mar 12, 2016

===========================
ORGANIZING COMMITTEE
===========================

  - Augusto Vega (IBM Research)
  - Xuan (Silvia) Zhang (Washington University in St. Louis)
  - David Brooks (Harvard University)
  - Alper Buyuktosunoglu (IBM Research)
  - Pradip Bose (IBM Research)

A next edition of the workshop on Software and Compilers for Embedded Systems  (SCOPES) will be organized in 2016. The workshop will feature a combination of research papers and research presentations (details see below). The papers and presentation abstracts will also be published in the ACM digital library. The workshop is held in cooperation with ACM SIGBED and EDAA.

AIM AND SCOPE

The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. Their functionality and number of features is increasing, and so are the constraints on the systems concerning size, performance, energy dissipation and timing predictability. To meet all these constraints, multi-processor systems on a chip (MPSoCs) are becoming popular in embedded systems. In order to meet the performance and energy constraints of embedded applications, heterogeneous  architectures incorporating functional units optimized for specific functions  are commonly employed. This technological trend has dramatic consequences on the parallelization, mapping, compiler and design technology used to develop these  systems.

The SCOPES workshop focuses on the software generation process for modern  embedded systems. Topics of interest include all aspects of the compilation and mapping process of embedded single and multi-processor systems. This includes  (but is not limited to):

– models of computation and programming languages;
– performance analysis techniques for models of computation;
– automatic code parallelization techniques;
– mapping and scheduling techniques for embedded multi-processor systems;
– code generation techniques for embedded single- and multi-processor architectures;
– design-space exploration techniques for use in the HW/SW codesign process;
– techniques to exploit the dynamic behavior in embedded applications;
– interactions between operating systems and compilers;
– techniques for compiler aided profiling, measurement, debugging and validation of embedded software.

WORKSHOP STRUCTURE

The workshop structure (presentations followed by intensive discussions) allows for an interactive atmosphere in which industrial and academic representatives can exchange new ideas and trends in the area MPSoC mapping and code generation.

SUBMISSION INSTRUCTIONS

SCOPES accepts two types of submissions (details can be found on scopesconf.org):

Research papers
Research papers should present original research results not published or submitted for publication in other  forums. Accepted papers will be published via the ACM digital library and they will be scheduled for a presentation  during the workshop. Research papers should not exceed 10 pages in ACM format (single-spaced, 2 columns, 9pt font; for instructions visit the ACM website). Papers must be submitted in PDF format using the SCOPES paper submission website. To permit blind review, submissions should not include the author names.

Research presentations
Research presentations should present research results relevant to the topics addressed by the workshop. These presentations may be based on research results that have previously been presented in other forums. Accepted presentations will be scheduled for a presentation during the workshop. Authors of accepted research presentations will be given the opportunity to publish a 4 page abstract in the workshop proceedings (available through ACM digital library). Publication in the proceedings is optional and the authors may decide not to do so. Authors that are interested in giving a research presentations at the SCOPES 2016 workshop should submit a 4 page abstract in ACM format (single-spaced, 2 columns, 9pt font; for instructions visit the ACM website). Abstracts must be submitted in PDF format using the SCOPES paper submission website. Author names should be included on these abstracts.

VENUE

The workshop will take place in the beautiful “Schloss Rheinfels” hotel at St. Goar, Germany. Schloss Rheinfels is a castle at one of the nicest places within the Rhine valley, itself a world heritage site. Among a set of hotels focusing on wellness, the hotel is voted yearly as being part of the top 3 conference hotels in Germany. There is a beautiful view from the hotel onto the river Rhine.

IMPORTANT DATES

Research papers
Full research paper submission:              February 14, 2016
Notification of acceptance:                     March 18, 2016
Final paper submission:                          April 3, 2016

Research presentations
Abstract submission research presentations:     February 14, 2016
Notification of acceptance:                     March 18, 2016
Final abstract submission:                       April 3, 2016

GENERAL CHAIR
Henk Corporaal, Eindhoven University of Technology, NL

PROGRAM CHAIR
Sander Stuijk, Eindhoven University of Technology, NL

PUBLICITY CHAIR
Peter Marwedel, Dortmund University of Technology, DE

PROGRAM COMMITTEE
Henri-Pierre Charles, CEA-LETI, FR
Albert Cohen, INRIA, FR
Koen De Bosschere, University of Gent, BE
Nikil Dutt, University of Irvine, USA
Heiko Falk, TU Hamburg-Harburg, DE
Carlo Galuzzi, Maastricht University, NL
Soheil Ghiasi, UC Davis, USA
Armin Größlinger, University of Passau, DE
Jan Haase, Helmut-Schmidt-Universität, DE
Frank Hannig, University of Erlangen, DE
Jörg Henkel, University of Karlsruhe, DE
Timothy Jones, University of Cambridge, UK
Ben Juurlink, TU Berlin, DE
Andreas Krall, TU Vienna, AT
Akash Kumar, TU Dresden, DE
Rainer Leupers, RWTH Aachen, DE
Luis Miguel Pinho, Polytechnic Institute of Porto, PO
Anca Molnos, CEA-LETI, FR
Andy Pimentel, University of Amsterdam, NL
Todor Stefanov, Leiden University, NL
Sander Stuijk, TU Eindhoven, NL
Jean-Pierre Talpin, INRIA, FR
Jürgen Teich, University of Erlangen, DE

************************************************************************

                         2nd International Workshop

  Integrating Dataflow, Embedded computing and Architecture, IDEA 2016

                      Vienna, Austria, April 11, 2016

                    http://caes.ewi.utwente.nl/idea2016

                     in conjunction with CPS week 2016

                        http://www.cpsweek.org/2016

— Selected papers will be considered for publication in ACM ToDAES —

*************************************************************************

*** IMPORTANT DATES ***

Submission deadline: January 8, 2016

Author notification: March 4, 2016

Workshop: April 11, 2016

*** CALL FOR PAPERS ***

The dataflow model of computation (with SDF, CSDF, and DDF as primary

representatives) offers a powerful perspective on parallel computations

that may be conditioned in terms of data dependencies. It dates back to

the nineteen sixties and has applications in the design of real-time

stream-processing systems, especially in the area of digital signal

processing. The dataflow model of computation fits the characteristics

of embedded and cyber-physical systems, with a strong emphasis on both

the functional and temporal aspects of data processing systems. Dataflow

is gaining renewed popularity, stimulated by the trend towards multi-core

and multi-processor architectures, with an influx of work ranging from

using dataflow as a programming paradigm, for performance analysis, or

for design optimization. Topics of interest for IDEA 2016 include, but are

not limited to:

– Dataflow architectures and dataflow as a programming paradigm for multi-core

  and multi-processor systems, for embedded systems and for cyber-physical

  systems.

– Tools for compilation, evaluation, optimization or synthesis of applications

  for heterogeneous and homogeneous multi-processor systems.

– Real-time scheduling, analysis, response time modeling, schedule synthesis.

– Variants of the dataflow model of computation, capturing e.g. dynamic

  execution behavior, stochastic dataflow.

– Dataflow theory, relations between dataflow and other models of computation,

  relations between dataflow variants.

– Dataflow in multi-disciplinary design, applications of dataflow in control,

  integrating dataflow and control theory.

– Case studies of general interest describing the application of dataflow in

  embedded computing and cyber-physical systems, ranging from automotive

  systems, and avionics, to high-tech systems, smart buildings and smart grids.

*** Submission guidelines ***

IDEA 2016 invites two types of submissions: full papers and interactive

presentations.

– Full paper submissions will be considered for publication in a special section

of ACM ToDAES and should follow the guidelines of the journal; see below.

– Interactive presentations can be anything from a poster to a demonstration of

software or a prototype. Interactive presentation proposals should be submitted

in the form of a 2-page abstract.

Submissions should be made electronically, via EasyChair:

https://easychair.org/conferences/?conf=idea20160.

Detailed submission guidelines can be found at the IDEA 2016 homepage.

*** PUBLICATION IN A SPECIAL SECTION OF ACM ToDAES ***

All accepted full paper submissions will be considered for publication in a

SPECIAL SECTION of ACM Transactions on Design Automation of Embedded Systems,

ACM ToDAES, todaes.acm.org. Full paper submissions for IDEA 2016 should follow

the ACM ToDAES author guidelines. Authors of papers accepted for IDEA 2016 are

expected to present their work at the workshop. After the workshop, revised

versions of the accepted workshop papers will undergo a second review round to

decide upon acceptance for the special section of ACM ToDAES.

*** GENERAL CHAIR ***

Twan Basten, TU Eindhoven, NL

*** PROGRAM CHAIRS ***

Orlando Moreira, Intel, NL

Robert De Groote, U Twente, NL

*** TECHNICAL PROGRAM COMMITTEE ***

Benny Åkesson, CISTER, Portugal

Marco Bekooij, NXP, U Twente, NL

Pieter Cuijpers, TU Eindhoven, NL

Marc Geilen, TU Eindhoven, NL

Michael Glaß, U Erlangen-Nürnberg, Germany

Kim Grüttner, OFFIS, Germany

Christian Haubelt, U Rostock, Germany

Alix Munier-Kordon, LIP6, France

Peter Poplavko, VERIMAG, Grenoble, France

Gerard Smit, U Twente, NL

Jean-Pierre Talpin, INRIA, France

Stavros Tripakis, Aalto, Finland & UC Berkley, USA

Xue-Yang Zhu, SKLCS, Beijing, China

*** ORGANIZING COMMITTEE ***

Alok Lele, TU Eindhoven, NL

Waheed Ahmad, U Twente, NL

*** SPONSORS ***

3TU – NIRICT – http://www.3tu.nl/nirict/

ALMARVI – http://www.almarvi.eu/

A next edition of the workshop on Software and Compilers for Embedded Systems  (SCOPES) will be organized in 2016. The workshop will feature a combination of research papers and research presentations (details see below). The papers and presentation abstracts will also be published in the ACM digital library. The workshop is held in cooperation with ACM SIGBED and EDAA.

AIM AND SCOPE

The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. Their functionality and number of features is increasing, and so are the constraints on the systems concerning size, performance, energy dissipation and timing predictability. To meet all these constraints, multi-processor systems on a chip (MPSoCs) are becoming popular in embedded systems. In order to meet the performance and energy constraints of embedded applications, heterogeneous  architectures incorporating functional units optimized for specific functions  are commonly employed. This technological trend has dramatic consequences on the parallelization, mapping, compiler and design technology used to develop these  systems.

The SCOPES workshop focuses on the software generation process for modern  embedded systems. Topics of interest include all aspects of the compilation and mapping process of embedded single and multi-processor systems. This includes  (but is not limited to):

– models of computation and programming languages;
– performance analysis techniques for models of computation;
– automatic code parallelization techniques;
– mapping and scheduling techniques for embedded multi-processor systems;
– code generation techniques for embedded single- and multi-processor architectures;
– design-space exploration techniques for use in the HW/SW codesign process;
– techniques to exploit the dynamic behavior in embedded applications;
– interactions between operating systems and compilers;
– techniques for compiler aided profiling, measurement, debugging and validation of embedded software.

WORKSHOP STRUCTURE

The workshop structure (presentations followed by intensive discussions) allows for an interactive atmosphere in which industrial and academic representatives can exchange new ideas and trends in the area MPSoC mapping and code generation.

SUBMISSION INSTRUCTIONS

SCOPES accepts two types of submissions (details can be found on scopesconf.org):

Research papers
Research papers should present original research results not published or submitted for publication in other  forums. Accepted papers will be published via the ACM digital library and they will be scheduled for a presentation  during the workshop. Research papers should not exceed 10 pages in ACM format (single-spaced, 2 columns, 9pt font; for instructions visit the ACM website). Papers must be submitted in PDF format using the SCOPES paper submission website. To permit blind review, submissions should not include the author names.

Research presentations
Research presentations should present research results relevant to the topics addressed by the workshop. These presentations may be based on research results that have previously been presented in other forums. Accepted presentations will be scheduled for a presentation during the workshop. Authors of accepted research presentations will be given the opportunity to publish a 4 page abstract in the workshop proceedings (available through ACM digital library). Publication in the proceedings is optional and the authors may decide not to do so. Authors that are interested in giving a research presentations at the SCOPES 2016 workshop should submit a 4 page abstract in ACM format (single-spaced, 2 columns, 9pt font; for instructions visit the ACM website). Abstracts must be submitted in PDF format using the SCOPES paper submission website. Author names should be included on these abstracts.

VENUE

The workshop will take place in the beautiful “Schloss Rheinfels” hotel at St. Goar, Germany. Schloss Rheinfels is a castle at one of the nicest places within the Rhine valley, itself a world heritage site. Among a set of hotels focusing on wellness, the hotel is voted yearly as being part of the top 3 conference hotels in Germany. There is a beautiful view from the hotel onto the river Rhine.

IMPORTANT DATES

Research papers
Full research paper submission:              February 14, 2016
Notification of acceptance:                     March 18, 2016
Final paper submission:                          April 3, 2016

Research presentations
Abstract submission research presentations:     February 14, 2016
Notification of acceptance:                     March 18, 2016
Final abstract submission:                       April 3, 2016

GENERAL CHAIR
Henk Corporaal, Eindhoven University of Technology, NL

PROGRAM CHAIR
Sander Stuijk, Eindhoven University of Technology, NL

PUBLICITY CHAIR
Peter Marwedel, Dortmund University of Technology, DE

PROGRAM COMMITTEE
Henri-Pierre Charles, CEA-LETI, FR
Albert Cohen, INRIA, FR
Koen De Bosschere, University of Gent, BE
Nikil Dutt, University of Irvine, USA
Heiko Falk, TU Hamburg-Harburg, DE
Carlo Galuzzi, Maastricht University, NL
Soheil Ghiasi, UC Davis, USA
Armin Größlinger, University of Passau, DE
Jan Haase, Helmut-Schmidt-Universität, DE
Frank Hannig, University of Erlangen, DE
Jörg Henkel, University of Karlsruhe, DE
Timothy Jones, University of Cambridge, UK
Ben Juurlink, TU Berlin, DE
Andreas Krall, TU Vienna, AT
Akash Kumar, TU Dresden, DE
Rainer Leupers, RWTH Aachen, DE
Luis Miguel Pinho, Polytechnic Institute of Porto, PO
Anca Molnos, CEA-LETI, FR
Andy Pimentel, University of Amsterdam, NL
Todor Stefanov, Leiden University, NL
Sander Stuijk, TU Eindhoven, NL
Jean-Pierre Talpin, INRIA, FR
Jürgen Teich, University of Erlangen, DE

————————————————————————-
Call for Papers, Tutorials, Workshops
————————————————————————-

E M B E D D E D    S Y S T E M S    W E E K

Pittsburgh, PA, US, October 2-7, 2016
www.esweek.org

=========================================================================
++ CASES ++ CODES+ISSS ++ EMSOFT ++ Symposia ++ Workshops ++ Tutorials ++
=========================================================================

————————————————————————-
Embedded Systems Week is . . .
————————————————————————-
ESWeek is the premier event covering all aspects of embedded systems
and software. By bringing together three leading conferences (CASES,
CODES+ISSS, and EMSOFT), several symposia (like ESTIMedia, RSP) and
hot-topic workshops and tutorials, ESWeek presents attendees a wide
range of topics unveiling the state of the art in embedded systems
design and HW/SW architectures.
http://esweek.acm.org/esweek2016_flyer.pdf
Registered attendees are entitled to attend sessions of all
conference CASES, CODES+ISSS, EMSOFT.
Symposia, workshops and tutorials require separate registration.

————————————————————————-
Timeline
————————————————————————-
– Paper Abstract Submission:              April 1, 2016
– Full Paper Submission:                  April 8, 2016 (Firm Deadline!)
– Tutorial Proposals:                     April 8, 2016
– Workshop Proposals:                     April 8, 2016
– Conference: October 2-7, 2016

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CASES: International Conference on Compilers, Architecture,
and Synthesis for Embedded Systems
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CASES is a forum where researchers, developers and practitioners exchange
information on the latest advances in compilers and architectures for
high performance embedded systems. In addition to our core areas of
technical interest including embedded system architectures, compilers and
embedded systems software, memory architectures, architectures targeting
power, reliability and security, and emerging application domains, we
especially encourage papers that address architectural synthesis and
compiler techniques for heterogeneous and accelerator-rich architectures.
http://esweek.acm.org/esweek2016_cases.pdf

CASES Program Chairs:
Siddharth Garg, NYU Polytechnic School of Engineering, US
Laura Pozzi, University of Lugano, CH

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CODES+ISSS: International Conference on Hardware/Software Codesign
and System Synthesis
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The International Conference on Hardware/Software Codesign and System
Synthesis is the premier event in system-level design, modeling,
analysis, and implementation of modern embedded and cyber-physical
systems, from system-level specification and optimization down to system
synthesis of multi-processor hardware/software implementations. The
conference is a forum bringing together academic research and industrial
practice for all aspects related to system-level and hardware/software
co-design. High-quality original papers will be accepted for oral
presentation followed by interactive poster sessions.
http://esweek.acm.org/esweek2016_codes+isss.pdf

CODES+ISSS Program Chairs:
Andreas Gerstlauer, University of Texas at Austin, US
Andy Pimentel, University of Amsterdam, NL

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EMSOFT: International Conference on Embedded Software
————————————————————————-
The ACM SIGBED International Conference on Embedded Software (EMSOFT)
brings together researchers and developers from academia, industry, and
government to advance the science, engineering, and technology of
embedded software development. Since 2001, EMSOFT has been the premier
venue for cutting-edge research in the design and analysis of software
that interacts with physical processes, with a long-standing tradition
for results on cyber-physical systems, which compose computation,
networking, and physical dynamics.
http://esweek.acm.org/esweek2016_emsoft.pdf

EMSOFT Program Chairs:
Petru Eles, Linkoping University, SE
Rahul Mangharam, University of Pennsylvania, US

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Paper Process
————————————————————————-
This year ESWeek will introduce a two-stage review process in order
to further increase quality. Papers passing the first stage need to
revise their work within a short time frame of around two weeks.
Further details will be published at least two months before the
submission deadline. Like always, all accepted papers come with a
talk and a poster presentation. Each accepted paper requires one
full conference registration.

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Call for Workshop Proposals
————————————————————————-
ESWeek 2016 will host several workshops on Oct. 6/7 and is soliciting
proposals for new and recurring workshops. ESWeek workshops are
excellent opportunities to bring together researchers and practitioners
from different communities to share their experiences in an interactive
atmosphere and to foster collaboration for new and innovative projects.
We invite you to submit workshop proposals on any topic related to the
broad set of research, education, and application areas in embedded systems.

Workshop Chair:
Tulika Mitra, National University of Singapore, SG

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Call for Tutorial Proposals
————————————————————————-
ESWeek 2016 is looking for high-quantity, timely tutorials to enrich its
technical program. Tutorials offer a unique opportunity where presenters
can interact closely with attendees and attendees can gain in-depth
knowledge on a specific topic. Tutorials on all topics related to
embedded system design, analysis and development are welcome. ESWeek 2016
tutorials will take place on Oct 2nd, and can be either be half day or full
day, lecture style or hands on labs. We invite you to submit tutorial
proposals before the deadline of April 8, 2016.

Tutorials Chair:
Sharon Hu, University of Notre Dame, US

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Organization
————————————————————————-
ESWeek General Chairs
Joerg Henkel, KIT Karlsruhe, DE (General Chair)
Lothar Thiele, Swiss Federal Institute of Technology, Zurich, CH (Vice General Chair)
ESWeek Local Arrangement Chair:
Alex K. Jones, University of Pittsburgh, US

_______________________________________________

CALL FOR PAPERS ECRTS 16
Submission deadline:  25 February 2016 (firm deadline)
——————————————————————————-

28th EUROMICRO CONFERENCE ON REAL-TIME SYSTEMS
Toulouse, France, 5-8th July 2016

Organized by the Euromicro Technical Committee on Real-Time Systems

Conference web site: ecrts16.ecrts.org
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THEME AND TOPICS OF INTEREST

ECRTS is the premier European venue for presenting research into the
broad area
of real-time and embedded systems.  Along with RTSS and RTAS, ECRTS ranks as
one of the top three international conferences on real-time systems.
Papers on
all aspects of real-time systems are welcome. These include, but are not
limited
to:

APPLICATIONS: consumer electronics & multimedia; process & industrial
control;
smart infrastructure; healthcare; aerospace; automotive; telecommunications;
cyber-physical systems.

INFRASTRUCTURE AND HARDWARE: communication networks; embedded devices;
hardware/software co-design; power-aware & other resource-constrained
techniques; multi/many-core architectures for real-time & safety; time
synchronization; wireless sensor networks.

SOFTWARE TECHNOLOGIES: middleware; operating systems; runtime environments;
virtualization and temporal isolation; software architecture; programming
language & compiler support; component-based approaches.

SYSTEM DESIGN AND ANALYSIS: modelling and formal methods; probabilistic
analysis; quality of service support; reliability, security and
survivability;
mixed-criticality systems; scheduling and schedulability analysis;
worst-case
execution time analysis; validation and verification techniques.

SUBMISSION OF PAPERS

Full papers must be submitted electronically through our web form in a pdf
format.  Details on submission format and constraints will be announced
shortly. Note that the submission deadline is a firm deadline and will
not be
extended.  A selection of the best papers will receive outstanding paper
awards, and will be highlighted as such in the conference proceedings. These
papers will form the shortlist for a best paper award, which will be
presented
at the conference. At ECRTS’16, we aim to be more inclusive and thus
accept a
larger number of high quality papers than in recent years.

CONFERENCE HIGHLIGHTS

Following a successful tradition at ECRTS there will be a number of
successful
Satellite Workshops including: OSPERT-Operating Systems Platforms for
Embedded
Real-Time applications, WCET-Worst-Case Execution Time analysis,
WATERS-Workshop on Analysis Tools and methodologies for Embedded and
Real-time
Systems, and RTSOPS-Real-Time Scheduling Open Problems Seminar. A special
session will provide a platform for presenting and revisiting Industrial
Challenges, issuing Call for Actions, and presentation of Work in Progress.
Separate Calls for Contributions will be issued later for these. Please
visit
the website at ecrts16.ecrts.org for details.

——————————————————————————-
Submission deadline:  25 February 2016 (firm deadline)
Workshops:  5 July 2016
Conference:  6-8 July 2016

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ORGANIZERS

PROGRAM CHAIR
Nathan Fisher
Wayne State University, Detroit, USA
fishern@wayne.edu

GENERAL CHAIR
Christian Fraboul
IRIT-ENSEEIHT, Toulouse, France
christian.fraboul@enseeiht.fr

REAL-TIME TECHNICAL
COMMITTEE CHAIR
Gerhard Fohler
TU Kaiserslautern, Germany
fohler@eit.uni-kl.de

——————————————————————————-
PROGRAM COMMITTEE

Tarek Abdelzaher, University of Illinois at Urbana-Champaign (USA)
Benny Akesson, CISTER/INESC-TEC, ISEP (Portugal)
Sebastian Altmeyer, University of Luxembourg (Luxembourg)
James H. Anderson, The University of North Carolina at Chapel Hill (USA)
Sanjoy Baruah, The University of North Carolina at Chapel Hill (USA)
Marko Bertogna, University of Modena (Italy)
Konstantinos Bletsas, CISTER/INESC-TEC, ISEP (Portugal)
Vincenzo Bonifaci, IASI-CNR (Italy)
Tam Chantem, Utah State University (USA)
Robert I. Davis, University of York (UK) & INRIA-Paris (France)
Jean-Dominique Decontignie, EPFL/CSEM (Switzerland)
Marco Di Natale, Scuola Superiore S. Anna (Italy)
Rolf Ernst, TU Braunschweig (Germany)
Gerhard Fohler, TU Kaiserslautern (Germany)
Sathish Gopalakrishnan, The University of British Columbia (Canada)
Nan Guan, Hong Kong Polytechnic University (Hong Kong SAR, China)
Song Han, University of Connecticut (USA)
Arne Hamann, Robert Bosch GmbH (Germany)
Leandro Soares Indrusiak, University of York (UK)
Jinkyu Lee, Sungkyunkwan University, (Korea)
George Lima, Federal University of Bahia (Brazil)
Cong Liu, University of Texas – Dallas (USA)
Martina Maggio, Lund University (Sweden)
Julio Luis Medina, University of Cantabria (Spain)
Claire Pagetti, ONERA (France)
Rodolfo Pellizzoni, University of Waterloo (Canada)
Linh Thi Xuan Phan, University of Pennsylvania (USA)
Isabelle Puaut, University of Rennes I / IRISA (France)
Peter Puschner, Vienna University of Technology (Austria)
Sophie Quinton, INRIA-Grenoble Rhone-Alpes (France)
Christine Rochange, IRIT, University of Toulouse (France)
Wilfried Stiener, TTTech (Austria)
Lothar Thiele, Swiss Federal Institute of Technology Zurich (Switzerland)
Marcus Volp, University of Luxembourg (Luxembourg)

• Rapid simulation techniques targeted at novel architectures: Multi-cores, 3D-architectures, FPGA based heterogeneous Multi-cores/MPSoC, …
• Variability and power/energy consumption in performance estimation and simulation techniques.
• High-level abstraction modeling, e.g., Transactional Level Modeling (TLM), Analytical Modeling, Trace-Driven Simulation …
• Design space exploration (DSE) for heterogeneous high-performance and embedded systems.
• Dynamic binary translation for fast simulation and DSE
• Experience reports using existing simulators and tools
• Benchmarking and simulator validation
• Early stage prototype of innovative architectures

2016 International Conference on Image Processing, Production and Computer Science (ICIPCS’2016) March 26-27, 2016 London-UK
26th to 27th March 2016
London, United Kingdom

Deadline for Full Paper/Abstracts/Posters Submission: Nov. 16, 2015
Please submit your papers by email at: editor@ureng.org

Each Paper will be assigned Digital Object Identifier(DOI) from CROSSREF. The Proceeding will be submitted to SCOPUS/ISI Thomson for review and possible indexing. In addition the proceedings will be indexed at Google and Google Scholar google.com

Topics of interest for submission include any topics on Image Processing, Production and Computer Science:
– Algorithms and Applications
– Computational Intelligence
– Computer and Information Technology
– Computer Architecture and Computer Aided Design
– Computer Architectures and Digital Systems
– Computer Networks and Security
– Computer Systems and Networks
– Computer Vision and Pattern Recognition
– Control Systems and Robotics
– Data Mining and Data fusion
– Data Mining and Management
– Databases and Data Mining
– Decision Support Systems
– Distributed and Parallel Systems
– Distributed, mobile, and open architecture
– Dynamical Systems
– E-Learning & E-Business
– Fuzzy, ANN & Expert Approaches
– Genetic Algorithms
– Grid and Cluster Computing
– Hierarchical Control Systems
– Human-Computer Interaction
– Hybrid Systems
– Information & data security
– Information systems & Applications
– Information Systems and ubiquitous technologies
– Innovative database technology
– Innovative platforms, architectures and technologies for Information Systems engineering
– Internet and Electronic Commerce
– Internet applications & performances
– Knowledge Based Systems
– Knowledge Management & Decision Making
– Logic Synthesis
– Management Information Systems
– Methodologies and approaches for Information Systems engineering
– Mobile networks & services
– Modeling and Simulation
– Multimedia and Web Applications
– Network and System Security
– Optimization
– Performance Modelling and Analysis
– Quality of models and of modelling languages
– Reliability Engineering and Fault Tolerance
– Satellite & Space Communications
– Scientific computing and supercomputing benchmark design
– Seismic Data Processing
– Service-oriented architecture
– Signal Processing
– Soft Computing
– Software Engineering
– Speech and Audio Processing
– Supercomputing and scientific computing
– Production Systems
– Automated Manufacturing Systems
– Computer Aided Design and Manufacturing
– MEMS and Mechatronics

For any inquiry about the submission and conference, please feel free to contact us at: editor@ureng.org

Registration/Fee details are available at: http://icipcs.org/registration.php

Important Dates are available at: http://icipcs.org/important_dates.php

Enquiries: editor@ureng.org
Web address: http://icipcs.org/
Sponsored by: URENG
Venue: Holiday Inn Express London – Heathrow T5, London Rd, Slough SL3 8QB, United Kingdom Phone:+44 1753 684001