International Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems (ERMAVSS)
Friday, March 18th 2016. Co-located with DATE (Design, Automation and Test in Europe) in Dresden, Germany.
Important Dates:
Submission Deadline : December 4th 2015
Notification of Acceptance : December 14th 2015
Final paper due : January 29th 2016
About the Workshop:
With the proliferation of integrated circuits implemented in the most advanced process technologies, there is a growing need to jointly analyze the effect of multiple sources of failures including variability and aging and to understand, early in the design cycle, their impact on system reliability. Today, conservative margins are required to ensure that devices operate correctly over their full lifetime, despite the impact of aging effects (BTI, HCI) and failure mechanisms such as EM. New methodologies for improved cross-layer modeling and mitigation, if planned early in the design of a product, have the potential to remove unnecessary conservatism, reduce power and cost and improve yield. This workshop is focused on sharing new research on techniques and methodologies for modeling the effects of failures due to transistor aging, variability and other mechanisms all the way from the cell level to system level. New approaches to perform early estimations of system reliability are much needed to enabling reliable, optimized and low-power designs.
Authors are invited to submit a 2-4 page short paper (using the standard IEEE two-column conference format) on topics related to:
- Early reliability modeling for complex silicon devices
- Advanced Modeling of degradation effects (HCI, xBTI, EM) and variability
- EDA flows and design tools for analyzing the effects of variability and aging
- Assessment of semiconductor degradation and failure effects on embedded and safety critical systems
- Modeling of the effects of environment, mission profile and workload on reliability
Submisssion Details
Papers can be submitted at https://easychair.org/
