Special Issue on Architecture of Future Many Core Systems

Microprocessors and Microsystems:

Special Issue on Architecture of Future Many Core Systems

General Scope:

High-performance computing systems continue to dominate the design of next generation processor architectures. These systems require specialized architectures in order to take advantage of multi-billions available on-chip transistors. This special issue is dedicated to research on the architecture and use of future many core processors. Original papers describing new and previously unpublished results are solicited on all aspects of future many core system (MCS) architectures, their performance, reliability, energy, and applications.

Papers under the following topics are considered:

  • Cache architectures of FMCS
  • Memory architecture of FMCS
  • Fault-tolerance and reliability of FMCS
  • Mapping and allocation in FMCS
  • Energy efficient FMCS
  • Workload characterization of FMCS
  • Emerging memory technologies in FMCS
  • FMCS in dark silicon era
  • Programming FMCS
  • Simulation of FMCS
  • and other related topics to FMCS.

Submission Information

All manuscripts and any supplementary material should be submitted via the online submission and peer review systems at http://ees.elsevier.com/micpro/. Please follow the submission instructions given on this site.  Authors should choose “SI: AFMCS” under Article Type Name.


Submission Deadline: 25 November 2015

Notification of Interim Decision: 1 February  2016

Revised Paper Submission:  1 March 2016

Final Decision: 12 April  2016

Final Paper: 10 May 2016

Guest Editors

Hamid Sarbazi-Azad, Sharif Univ. of Technology and IPM

Hossein Asadi, Sharif Univ. of Technology

Paolo Ienne, EPFL