Archives for November 1, 2015

CALL FOR PAPERS ECRTS 16

CALL FOR PAPERS ECRTS 16
Submission deadline:  25 February 2016 (firm deadline)
——————————————————————————-

28th EUROMICRO CONFERENCE ON REAL-TIME SYSTEMS
Toulouse, France, 5-8th July 2016

Organized by the Euromicro Technical Committee on Real-Time Systems

Conference web site: ecrts16.ecrts.org
——————————————————————————-

THEME AND TOPICS OF INTEREST

ECRTS is the premier European venue for presenting research into the
broad area
of real-time and embedded systems.  Along with RTSS and RTAS, ECRTS ranks as
one of the top three international conferences on real-time systems.
Papers on
all aspects of real-time systems are welcome. These include, but are not
limited
to:

APPLICATIONS: consumer electronics & multimedia; process & industrial
control;
smart infrastructure; healthcare; aerospace; automotive; telecommunications;
cyber-physical systems.

INFRASTRUCTURE AND HARDWARE: communication networks; embedded devices;
hardware/software co-design; power-aware & other resource-constrained
techniques; multi/many-core architectures for real-time & safety; time
synchronization; wireless sensor networks.

SOFTWARE TECHNOLOGIES: middleware; operating systems; runtime environments;
virtualization and temporal isolation; software architecture; programming
language & compiler support; component-based approaches.

SYSTEM DESIGN AND ANALYSIS: modelling and formal methods; probabilistic
analysis; quality of service support; reliability, security and
survivability;
mixed-criticality systems; scheduling and schedulability analysis;
worst-case
execution time analysis; validation and verification techniques.

SUBMISSION OF PAPERS

Full papers must be submitted electronically through our web form in a pdf
format.  Details on submission format and constraints will be announced
shortly. Note that the submission deadline is a firm deadline and will
not be
extended.  A selection of the best papers will receive outstanding paper
awards, and will be highlighted as such in the conference proceedings. These
papers will form the shortlist for a best paper award, which will be
presented
at the conference. At ECRTS’16, we aim to be more inclusive and thus
accept a
larger number of high quality papers than in recent years.

CONFERENCE HIGHLIGHTS

Following a successful tradition at ECRTS there will be a number of
successful
Satellite Workshops including: OSPERT-Operating Systems Platforms for
Embedded
Real-Time applications, WCET-Worst-Case Execution Time analysis,
WATERS-Workshop on Analysis Tools and methodologies for Embedded and
Real-time
Systems, and RTSOPS-Real-Time Scheduling Open Problems Seminar. A special
session will provide a platform for presenting and revisiting Industrial
Challenges, issuing Call for Actions, and presentation of Work in Progress.
Separate Calls for Contributions will be issued later for these. Please
visit
the website at ecrts16.ecrts.org for details.

——————————————————————————-
Submission deadline:  25 February 2016 (firm deadline)
Workshops:  5 July 2016
Conference:  6-8 July 2016

——————————————————————————-
ORGANIZERS

PROGRAM CHAIR
Nathan Fisher
Wayne State University, Detroit, USA
fishern@wayne.edu

GENERAL CHAIR
Christian Fraboul
IRIT-ENSEEIHT, Toulouse, France
christian.fraboul@enseeiht.fr

REAL-TIME TECHNICAL
COMMITTEE CHAIR
Gerhard Fohler
TU Kaiserslautern, Germany
fohler@eit.uni-kl.de

——————————————————————————-
PROGRAM COMMITTEE

Tarek Abdelzaher, University of Illinois at Urbana-Champaign (USA)
Benny Akesson, CISTER/INESC-TEC, ISEP (Portugal)
Sebastian Altmeyer, University of Luxembourg (Luxembourg)
James H. Anderson, The University of North Carolina at Chapel Hill (USA)
Sanjoy Baruah, The University of North Carolina at Chapel Hill (USA)
Marko Bertogna, University of Modena (Italy)
Konstantinos Bletsas, CISTER/INESC-TEC, ISEP (Portugal)
Vincenzo Bonifaci, IASI-CNR (Italy)
Tam Chantem, Utah State University (USA)
Robert I. Davis, University of York (UK) & INRIA-Paris (France)
Jean-Dominique Decontignie, EPFL/CSEM (Switzerland)
Marco Di Natale, Scuola Superiore S. Anna (Italy)
Rolf Ernst, TU Braunschweig (Germany)
Gerhard Fohler, TU Kaiserslautern (Germany)
Sathish Gopalakrishnan, The University of British Columbia (Canada)
Nan Guan, Hong Kong Polytechnic University (Hong Kong SAR, China)
Song Han, University of Connecticut (USA)
Arne Hamann, Robert Bosch GmbH (Germany)
Leandro Soares Indrusiak, University of York (UK)
Jinkyu Lee, Sungkyunkwan University, (Korea)
George Lima, Federal University of Bahia (Brazil)
Cong Liu, University of Texas – Dallas (USA)
Martina Maggio, Lund University (Sweden)
Julio Luis Medina, University of Cantabria (Spain)
Claire Pagetti, ONERA (France)
Rodolfo Pellizzoni, University of Waterloo (Canada)
Linh Thi Xuan Phan, University of Pennsylvania (USA)
Isabelle Puaut, University of Rennes I / IRISA (France)
Peter Puschner, Vienna University of Technology (Austria)
Sophie Quinton, INRIA-Grenoble Rhone-Alpes (France)
Christine Rochange, IRIT, University of Toulouse (France)
Wilfried Stiener, TTTech (Austria)
Lothar Thiele, Swiss Federal Institute of Technology Zurich (Switzerland)
Marcus Volp, University of Luxembourg (Luxembourg)

8th Workshop on Rapid Simulation

!!! DEADLINE EXTENDED: Nov. 8 !!!
CALL FOR PAPERS
8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools –
in Prague, Czech Republic, 18 January, 2016
Held in conjunction with the HiPEAC Conference  (http://www.hipeac.net/conference)
Confirmed Keynote Speakers: 
– Khaled Benkrid, ARM
– Jurgen Teich, University of Erlangen-Nuremberg
– Tim Kogel, Synopsys
=====================================================================

 

Goal of the Workshop :
The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance system design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple (heterogeneous) processor cores, multiple levels of (shared/private) caches or memories, and dedicated accelerators, which will be glued together through a network on-chip (NoC).
The design space is huge though and several design metrics should be considered as well for selecting the optimal system configuration. Despite several years of research, the early stage design phase still requires to be supported by innovative design methodologies and tools for simulation, exploartion and performance evaluation. RAPIDO seeks for original research papers that face this challenge for embedded and high performance computing systems.

 

Topics of interest :
Topics of interest include, but are not limited to:
  • Rapid simulation techniques targeted at novel architectures: Multi-cores, 3D-architectures, FPGA based heterogeneous Multi-cores/MPSoC, …
  • Variability and power/energy consumption in performance estimation and simulation techniques.
  • High-level abstraction modeling, e.g., Transactional Level Modeling (TLM), Analytical Modeling, Trace-Driven Simulation …
  • Design space exploration (DSE) for heterogeneous high-performance and embedded systems.
  • Dynamic binary translation for fast simulation and DSE
  • Experience reports using existing simulators and tools
  • Benchmarking and simulator validation
  • Early stage prototype of innovative architectures
Important dates:
Submission deadline: Nov 8, 2015 (!!!EXTENDED!!!)
Notification to authors: Nov 24, 2015
Final version of accepted papers: Dec 3, 2015

 

Paper submission :
Electronic paper submission requires a full paper, up to 6 double-column ACM format pages, including figures and references. Up to 2 extra-pages can be requested for free to the organizing commettee (gianluca dot palermo at polimi dot it). Please use the following template when preparing your manuscript: http://www.acm.org/sigs/publications/proceedings-templates
The paper submission will be conducted using the EasyChair conference manager. Papers should be submitted in PDF format. You will find the submission site at:  https://easychair.org/conferences/?conf=rapido16

 

Accepted papers will be published in the ACM digital library.

 

Organizers:
Gianluca Palermo, Politecnico di Milano
Daniel Gracia Pérez, Thales Research and Technology France
Morteza Biglari-Abhari, University of Auckland
Smail Niar, University of Valenciennes
Daniel Chillet, Université de Rennes 1
Adam Morawiec, ECSI, France