Archives for December 2015

2016 DUBAI International Conference on “Engineering Management and Technology” (EMT-16)

2016 DUBAI International Conference on “Engineering Management and Technology” (EMT-16)
15th to 16th March 2016
Dubai, United Arab Emirates

All accepted papers of the conference will be published in the printed conference proceedings with valid International ISBN number that will be registered at: London, UK and papers will be Indexed by DOI and other Indexing agencies. The conference is sponsored by Universal Researchers (UAE). One Best Session Paper will be selected from each oral session. The Certificate for Session Best Papers will be awarded after each session of the conference

Topics/Scope
-Computer Science & Engineering
-Data Mining
-Artificial Intelligence
-Chemical Engineering
-Civil Engineering
-Electrical Engineering
-Information Technology
-Electronics and Communication Engineering
-Industrial Engineering
-Internet
-Image and Signal Processing
-Mechanical Engineering
-Aeronautical Engineering
-Robotics
-Software Engineering
-and its Applications

SUBMISSION METHODS
1. Electronic Submission System; ( .doc/.docx/.pdf formats) using “Paper Submission link”
OR
2. Email: cs@iaetr.org
Paper Format: http://uruae.org/ckfinder/userfiles/files/PaperTemplate-URUAE.doc

REGISTRATION FEE
Authors (Student)*: 190 USD
Authors (Non Student)*: 225 USD
Coauthor/Listener: 175 USD

Enquiries: cs@iaetr.org
Web address: http://iaetr.org/conference.php?slug=EMT-16&sid=1&catDid=101
Sponsored by: Universal Researchers (UAE)-IAETR

CONTACT US
Ms. Rosy Tan Email: cs@iaetr.org Phone: +44 7452 131713, +971 52 829 9493 (Can use LINE, Whatsapp, Viber)

 

10th International Symposium on Networks-on-Chip (NOCS 2016)

[Apologies if you receive multiple copies of this message]
*********************************************************************
			Call for Papers

10th International Symposium on Networks-on-Chip (NOCS 2016)
August 31 - September 2, 2016
Nara, Japan
		http://www.arc.ics.keio.ac.jp/nocs16
*********************************************************************

	The International Symposium on Networks-on-Chip (NOCS) is the
premier event dedicated to interdisciplinary research on on-chip,
chip-scale, and multichip package scale communication technology,
architecture, design methods, applications and systems. NOCS brings
together scientists and engineers working on NoC innovations and
applications from inter-related research communities, including
computer architecture, networking, circuits and systems, packaging,
embedded systems, and design automation. Topics of interest include,
but are not limited to:

NoC Architecture and Implementation:

1. Network architecture (topology, routing, arbitration)
2. NoC Quality of Service
3. Timing, synchronous/asynchronous communication
4. NoC reliability issues
5. Network interface issues
6. NoC design methodologies and tools
7. Signaling & circuit design for NoC links

NoC Analysis and Verification:

1. Power, energy & thermal issues (at the NoC, un-core and/or system-level)
2. Benchmarking & experience with NoC-based hardware
3. Modeling, simulation, and synthesis of NoCs
4. Verification, debug & test of NoCs
5. Metrics and benchmarks for NoCs

Novel NoC Technologies:

1. New physical interconnect technologies, e.g., carbon nanotubes, wireless
   NoCs, through-silicon, etc. 
2. NoCs for 3D and 2.5D packages
3. Package-specific NoC design
4. Optical, RF, & emerging technologies for on-chip/in-package interconnects

NoC Application:

1. Mapping of applications onto NoCs
2. NoC case studies, application-specific NoC design
3. NoCs for FPGAs, structured ASICs, CMPs and MPSoCs
4. NoC designs for heterogeneous systems, fused CPU-GPU architectures, etc
5. Scalable modeling of NoCs

NoC at the Un-Core and System-level:
 
1. Design of memory subsystem (un-core) including memory controllers,
   caches, cache coherence protocols & NoCs
2. NoC support for memory and cache access
3. OS support for NoCs
4. Programming models including shared memory, message passing and
   novel programming models
5. Issues related to large-scale systems (datacenters, supercomputers)
   with NoC-based systems as building blocks

On-Chip Communication Optimization:

1. Communication efficient algorithms
2. Multi/many-core communication workload characterization & evaluation
3. Energy efficient NoCs and energy minimization

	Electronic paper submission requires a full paper, up to 8
double-column IEEE format pages, including figures and references.
The program committee in a double-blind review process will evaluate
papers based on scientific merit, innovation, relevance, and presentation.
	Submitted papers must describe original work that has not been
published before or is under review by another conference or journal
at the same time. Each submission will be checked for any significant
similarity to previously published works or for simultaneous
submission to other archival venues, and such papers will be rejected. 
Proposals for special sessions, tutorials, and demos are invited. Paper 
submissions and demo proposals by industry researchers or engineers to
share their experiences and perspectives are also welcome.
	Please see the detailed submission instructions for paper
submissions, special session, tutorial, and demo proposals at the
submission page. Further information is available via:
http://www.arc.ics.keio.ac.jp/nocs16

Important Dates:

Abstract registration deadline		February 5th, 2016
Full paper submission deadline		February 12th, 2016
Notification of acceptance		April 8th, 2016
Final version due			May 18th, 2016

Organizing Committee

General Co-Chairs:
- Hideharu Amano (Keio University, Japan) 
- Partha Pratim Pande (Washington State University, USA) 
Technical Program Co-Chairs:
- Hiroki Matsutani (Keio University, Japan) 
- Sriram Vangal (Intel, USA) 
Publicity Co-Chairs:
- John Kim (Korea Advanced Institute of Science and Technology, Korea) 
- Turbo Majumder (Intel, USA) 
- Maurizio Palesi (Kore University, Italy) 
Publication Chair:
- Umit Ogras (Arizona State University, USA) 
Special Sessions Co-Chairs:
- Michihiro Koibuchi (National Institute of Informatics, Japan) 
- Sudeep Pasricha (Colorado State University, USA) 
Tutorial Chair:
- Paul Bogdan (University of Southern California, USA) 
Finance Chair:
- Ikki Fujiwara (National Institute of Informatics, Japan) 
Registration Chair:
- Takashi Nakada (University of Tokyo, Japan) 
Local Arrangements Chair:
- Shinya Takamaeda (Nara Institute of Science and Technology, Japan) 
*********************************************************************

CALL FOR WiP PAPERS AND DEMOS: RTAS 2016

[Our apologies if you receive multiple copies of this CfP]

—————————————-
CALL FOR WiP PAPERS AND DEMOS: RTAS 2016
—————————————-

The 22nd IEEE Rea​l-Time and Embedded Technology and Applications Symposium (RTAS 2016) will be held in Vienna, Austria, as part of the Cyber-Physical Systems Week (CPSWeek) in April 2016. The conference includes a Work in Progress (WiP) and Demo session intended for presentation of recent and on-going work, as well as for demonstrations of tools and technology that have the potential to be used in the design and development of real-time systems. In keeping with the spirit of the main symposium, we invite submissions of WiP papers and demos with an emphasis on system and application aspects. Authors of accepted WiP/demo papers are expected to give a brief presentation to the RTAS’16 audience followed by a poster/demo presentation at the reception held on April 12, 2016.

Web site: http://2016.rtas.org/

WORK IN PROGRESS SESSION
—————————————-

The WiP session at RTAS 2016 is dedicated to new and on-going research in the field of real-time and embedded systems. Authors are invited to submit short papers describing ongoing, unpublished work in all areas of real-time and embedded technology, including applications, systems, tools, methodologies, foundations, wireless sensor networks, and hardware-software co-design. The WiP session provides researchers and developers with an opportunity to discuss evolving and early-stage ideas, and to solicit feedback from the real-time systems community at large.

DEMO SESSION
—————————————-

The demo session at RTAS 2016 will provide a forum for researchers to give a demonstration of their work with concrete systems, tools and prototypes in all areas of real-time embedded technology and applications as part of the CPS Week joint poster/demo session. Authors are invited to submit short technical abstracts (up to 2 pages) describing what will be demonstrated and how the contributions will be illustrated interactively. Authors of papers accepted at RTAS’16 are welcome to propose a demo of their work.

IMPORTANT DATES
—————————————-

Abstract and short paper submission deadline – Jan 16, 2016 at 23:59 GMT-12
Acceptance notification – Jan 29, 2016
Final version (abstracts and papers) – Feb 5, 2016
WiP/Demo session – Apr 12, 2016

TOPICS OF INTEREST
—————————————-

Topics of particular interest include, but are not limited to:
– Applications and case studies
– Runtime environment, OS, and middleware
– Adaptive systems
– Analysis, simulation, and debugging tools
– Cloud and distributed computing
– Composition and component-based systems
– Computer architectures and microprocessors
– Execution-time analysis (static, measurement-based, and probabilistic)
– Formal methods
– Hardware/software co-design
– Many-core systems
– Multi-criticality systems
– Multicore and GPU computing
– Power-, thermal-, and energy-aware computing
– Programming languages and compilers
– Real-time databases
– Scheduling and schedulability analysis
– SoCs, FPGAs, and reconfigurable systems
– Software engineering
– Storage systems
– Synchronization
– System synthesis and optimization
– Testing, validation, and certification
– Virtualization and isolation
– Wireless communications

SUBMISSION OF PAPERS
—————————————-

This year, every author is required to submit two separate documents:

1. An abstract that will appear in the main proceedings. These abstracts must include a conventional header with the title of the WiP/demo paper and the names and affiliations of the authors. The header must be followed by approximately 300 words (i.e. about half a page) that summarize in one or two paragraphs the research context and the specificity of the solution that will be presented/demonstrated. To avoid doubling up the references and skewing the citation count, it is extremely important to note that these abstracts must *not* contain references nor acknowledgments! All references and acknowledgements will be removed from the document before its publication in the main proceedings.

2. A short paper that will be made available online and at the conference.

– WiP papers should consist of 2 to 4 pages in the IEEE 10-point, two-column conference format, including all references and appendices. The submitted paper must be original material that has neither been previously published nor is currently under review by another conference or journal, and will not be submitted elsewhere before notification by RTAS 2016. Submissions will be refereed for quality and relevance. Submissions that fail to comply with the formatting requirements will not be reviewed.

– Demo papers should adhere to the IEEE 10-point, two-column conference format, and be 1 to 2 pages long, including all references and appendices. They should repeat and extend the information provided in the abstract. In addition, they must clearly describe what will be demonstrated and how the contributions will be illustrated interactively. If a demonstration requires special arrangements (in addition to a table, power, and wireless connectivity), please describe them clearly in the paper. Submissions will be evaluated based on technical merit and innovation as well as the potential to stimulate interesting discussions and exchange of ideas at the conference.

Abstracts and short papers must be submitted electronically in PDF.

By submitting a paper, the authors agree and confirm that, in case of acceptance, at least one author will register for the conference and present the WiP/demo in person. Instructions for preparing the final version of accepted WiP/demo papers and their presentation will be sent along with the notification.

WORK-IN-PROGRESS CHAIR
—————————————-

Vincent Nelis, CISTER/INESC TEC and ISEP, Portugal

WORK-IN-PROGRESS PROGRAM COMMITTEE
—————————————-

Borislav Nikolic, CISTER/INESC TEC and ISEP, Portugal
Björn Brandenburg, Max Planck Institute for Software Systems, Germany
David Bol, Microelectronics laboratory – ICTEAM institute, Université catholique de Louvain, Belgium
Benny Akesson, CISTER/INESC TEC and ISEP, Portugal
Leandro Indrusiak, University of York, U.K.
Andrea Marongiu, Integrated Systems Laboratory, ETH, Swiss
Paolo Burgio, University of Modena, Italy
Dakshina Dasari Research and Technology Centre at Robert Bosch, India
Gurulingesh Raravi, Distributed and Mobile Computing group in Xerox Research Center India
Mircea Negrean, IAV GmbH, Germany

DEMO CHAIR
—————————————-

Sophie Quinton, Inria Grenoble Rhône-Alpes, France

DEMO PROGRAM COMMITTEE
—————————————-

Luís Almeida, University of Porto, Portugal
Loïc Fejoz, RealTime-at-Work, France
Daniel Lohmann, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
Martina Maggio, Lund University, Sweden
Gabriel Parmer, George Washington University, USA
Insik Shin, KAIST, Korea
Marcus Völp, University of Luxemburg, Luxemburg
Dirk Ziegenbein, Bosch GmbH, Germany


————————————-
Sophie Quinton
INRIA Grenoble – Rhône-Alpes
655 Avenue de l’Europe – Montbonnot
38334 St Ismier Cedex – FRANCE
tel: +33 4 76 61 55 31
https://team.inria.fr/spades/quinton/
————————————-

CFP-JOURNAL OF SYSTEMS ARCHITECTURE (JSA), Elsevier

C a l l    f o r   p a p e r s

Special Issue on

“Reliable Software Technologies for Dependable Distributed Systems”
JOURNAL OF SYSTEMS ARCHITECTURE (JSA), Elsevier.

(Indexed by JCR)

Submission deadline:  April 20th, 2016
————————————————————————-

SCOPE AND TOPICS:

The number of distributed applications as well as the number of users accessing
remote infrastructures and applications has increased exponentially in the last
decade.  New computing infrastructures are now capable of hosting complex
applications, being still the main bottleneck on the software side.  The software
platforms are constantly challenged by the progress pace of hardware, e.g.,
multi-core, GPU accelerated processing, or high speed intra- and inter-node
communication networks. The software level highly impacts systems’ dependability.

This special issue calls for contributions on design and implementation of
dependable systems. Software intensive dependable systems design and implementation
models that efficiently manage the platform resources. Contributions on the
selection and evaluation of distributed interaction models for middleware, software
technology choices, model-based design including accurate though flexible temporal
behavior modeling, resource efficiency, performance, scalability, and coordination
are requested. Contributions may focus at the different levels of the software
stack of a reliable system: operating systems, middleware, programming models,
security, and related mechanisms to enhance the flexibility and reliability.

Topics include (but are not limited to) the challenging issues in the design of
reliable and resource efficient software infrastructures for dependable distributed
systems, possibly at large scale:

* Distribution models in middleware (publish-subscribe, remote invocations, events,etc.)
* Model driven design
* Resource management, quality of service,  and real-time
* Operating systems and virtualization technology
* Software enabling tools for cyber-physical systems
* Distributed embedded systems
* Performance and quality models in distributed dependable settings
* Exploiting computation power of hardware (multi-core, GPUs, etc.)
* Experiences in actual application scenarios
* Security in large scale deployments
* Quality-aware on-line stream processing

SUBMISSION FORMAT:

Contributions should be novel, original work, not previously published. Papers should
not be under review at any scientific event (either conference or workshop).

Papers that have been previously published in conferences or journals are encouraged
to be submitted if they contain, at least, 35% new material and results. This should
be clearly indicated in the cover letter.

Submissions will be between 8 and 10 pages in double column format at the initial
submission stage.  Up to 12 pages after considering reviewers comments and for the
camera ready version.

IMPORTANT DATES:

The timeline for the review process is as follows:

– Submission: April 20th, 2016

– Tentative publication: December 16 to April 17

GUEST EDITORS:

António Casimiro, Universidade de Lisboa, Portugal
Marisol Garcia-Valls, Universidad Carlos III de Madrid, Spain
Hans P. Reiser, University of Passau, Germany

RAW 2016 – CFP: Submissions Now Open

[Please accept our apologies if you receive multiple copies of this Call for Papers (CFP)]
RAW 2016 – CFP: Submissions Now Open
==========================
23rd Reconfigurable Architectures Workshop
May 23-24, 2016
Chicago, Illinois USA
Important Dates:
Abstract submission: January  4, 2016
Submission deadline: January  8, 2016
Decision notification: February 12, 2016
Camera-Ready papers due: February 26, 2016
Selected papers from RAW 2016 will be invited for submission to a special issue on Reconfigurable Computing for the Journal of Parallel and Distributed Computing.
Submissions are now open. See website for information.
The 23rd Reconfigurable Architectures Workshop (RAW 2016) will be held in Chicago, Illinois USA in May 2016. RAW 2016 is associated with the 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2016) and is sponsored by the IEEE Computer Society Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of underlying hardware architectures or devices to rapidly alter (often on the fly) the functionalities of their components and the interconnection between them to suit the problem at hand. The area has a rich theoretical tradition and wide practical applicability. There are several commercially available reconfigurable platforms (FPGAs and coarse-grained devices) and many modern applications (including embedded systems and HPC) use reconfigurable subsystems. An appropriate mix of theoretical foundations and practical considerations, including algorithms architectures, applications, technologies and tools, is essential to fully exploit the possibilities offered by reconfigurable computing. The Reconfigurable Architectures Workshop aims to provide a forum for creative and productive interaction for researchers and practitioners in the area.
Authors are invited to submit manuscripts of original unpublished research in all areas of reconfigurable systems, including architectures, algorithms, applications, software and cross-cutting areas.
Topics of interest include, but are not limited to:
Architectures & Algorithms
· Theoretical Interconnect and Computation Models
· Algorithmic Techniques and Mapping
· Run-Time Reconfiguration Models and Architectures
· Emerging Technologies (optical models, 3D Interconnects, devices)
· Bounds and Complexity Issues
· Analog Arrays
Reconfigurable Systems & Applications
· Reconfigurable Accelerators (HPC, Bioinformatics, Acceleration Applications in Finance, Data Mining, Big Data, and Analytics)
· Embedded systems and Domain-Specific solutions (Digital Media, Gaming, Automotive applications)
· FPGA-based MPSoC and Multicore
· Distributed Systems and Networks
· Wireless and Mobile Systems
· Emerging applications (Organic Computing, Biology-Inspired Solutions)
· Critical issues (Security, Energy efficiency, Fault-Tolerance)
Software & Tools
· Operating Systems and High Level Synthesis
· High-Level Design Methods (Hardware/Software Co-design, Compilers)
· System Support (Soft Processor Programming)
· Runtime Support
· Reconfiguration Techniques (Reusable Artifacts)
· Simulations and Prototyping (Performance Analysis, Verification Tools)
Submission Guidelines:
All manuscripts will be reviewed by at least three members of the program committee. Submissions should be a complete manuscript or, in special cases, may be a summary of relevant work. The manuscript should be not exceed 8 single-spaced, double-column pages using 10-point size font on 8.5X11 inch pages (IEEE conference style) including references, figures and tables. Papers are to be submitted through EDAS. Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers (regular or poster) will be presented at the workshop by one of the authors.
Publication:
IEEE CS Press will publish the IPDPS symposium and workshop abstracts as a printed volume. The complete symposium and workshop proceedings will also be published by IEEE CS Press as a CD-ROM disk and will be available in the IEEE Digital Library.
Selected papers from RAW 2016 will be invited for submission to a special issue on Reconfigurable Computing for the Journal of Parallel and Distributed Computing.

ERTS 2016 – EMBEDDED REAL TIME SOFTWARE AND SYSTEMS

ERTS 2016 – EMBEDDED REAL TIME SOFTWARE AND SYSTEMS
January 27th – 29th 2016, Toulouse – France
http://www.erts2016.org
************************

Dear Madam, Dear Sir,

The Organizing Committee along with the Technical Committee are pleased to announce that ERTS 2016 programme is now available on the conference website www.erts2016.org

ERTS 2016 is a 3 days conference*

* 6 main topics which gather over 60 presentations
· Embedded Computing Platforms and Networks Systems
· Processes, Methods and Tools
· Dependability: Safety, Security, Quality of Service, Fault Tolerance
· Software Verification/Validation/Certification
· Model Driven Engineering
· Application Domain

* 3 panels (one per day)
· Panel 1 on Wednesday : Foundations of trust for safety critical software
· Panel 2 on Thursday : Internet of Things: business models & technology enablers
· Panel 3 on Friday : Highly Automated Driving

*3 keynote speakers
· Edward A. Lee – Professor, Berkeley University, USA/ Wednesday 27 January
· Heinrich Daembkes – Airbus Defence and Space, GERMANY/ Thursday 28 January
· François Neumann – VP, Director of research and technology, Safran Electronics, France / Friday 29 January
More information on http://www.erts2016.org/keynote-address.html

* And an exhibition with over 40 exhibitors.
See list on http://www.advbe.com/docs/ERTS2016-Listeprovisoiredes_exposants.pdf *

*VISIT THE ERTS 2016 PROGRAMME NOW AND REGISTER TO THIS SPECIAL EVENT!***

2016 Bangkok International Conference on “Innovative Research in Engineering and Technology” (IRET-16)

2016 Bangkok International Conference on “Innovative Research in Engineering and Technology” (IRET-16) Jan. 21-22, 2016
21st to 22nd January 2016
Bangkok, Thailand

All accepted papers of the conference will be published in the printed conference proceedings with valid International ISBN number that will be registered at: London, UK and papers will be Indexed by DOI and other Indexing agencies. The conference is sponsored by Universal Researchers (UAE). One Best Session Paper will be selected from each oral session. The Certificate for Session Best Papers will be awarded after each session of the conference

Topics/Scope
-Computer Science & Engineering
-Data Mining
-Artificial Intelligence
-Chemical Engineering
-Civil Engineering
-Electrical Engineering
-Information Technology
-Electronics and Communication Engineering
-Industrial Engineering
-Internet
-Image and Signal Processing
-Mechanical Engineering
-Aeronautical Engineering
-Robotics
-Software Engineering
-and its Applications

SUBMISSION METHODS
1. Electronic Submission System; ( .doc/.docx/.pdf formats) using “Paper Submission link”
OR
2. Email: cs@iaetr.org
Paper Format: http://uruae.org/ckfinder/userfiles/files/PaperTemplate-URUAE.doc

REGISTRATION FEE
Authors (Student)*: 190 USD
Authors (Non Student)*: 225 USD
Coauthor/Listener: 175 USD

Enquiries: cs@iaetr.org
Web address: http://iaetr.org/conference.php?slug=IRET-16&sid=1&catDid=98
Sponsored by: Universal Researchers (UAE)-IAETR

CONTACT US
Ms. Rosy Tan Email: cs@iaetr.org Phone: +44 7452 131713, +971 52 829 9493 (Can use LINE, Whatsapp, Viber)

CONFERENCE VENUE
Mercure Bangkok Siam
Address: 927 Rama 1 Road Wangmai – Pathumwan; 10330 BANGKOK – THAILAND

5th Mediterranean Conference on Embedded Computing

MECO’2016

5th Mediterranean Conference on

Embedded Computing

Bar • Montenegro • June 12-16, 2016

http://embeddedcomputing.me

 

Call for Papers

 

MECO’2016 – the 5th Mediterranean Conference on Embedded Computing (MECO 2016) is the next of a series of very successful MECO events. It is an International Scientific Forum aimed at presentation and discussion of leading achievements in modeling, analysis, development, validation and application of embedded computing systems. MECO 2016 will provide an opportunity for scientists, engineers and researchers to discuss new applications, design problems, ideas, solutions, research and development results, experiences and work-in-progress in this important technological area. Topics of interest include, but are not limited to:

ñ     Software and Hardware Architectures for Embedded Systems

ñ     Systems on Chip (SoCs) and Multicore Systems

ñ     Communications, Networking and Connectivity

ñ     Internet of Things

ñ     Sensors and Sensor Networks

ñ     Mobile and Pervasive/Ubiquitous Computing

ñ     Distributed Embedded Computing

ñ     Real-Time Systems

ñ     Adaptive Systems

ñ     Reconfigurable Systems

ñ     Design Methodology and Tools

ñ     Application Analysis and Parallelization

ñ     System Architecture Synthesis

ñ     Multi-objective Optimization

ñ     Low-power Design and Energy Management

ñ     Hardware/Software Simulation

ñ     Rapid prototyping

ñ     Testing and Benchmarking

ñ     Micro and Nano Technology

ñ     Organic/Flexible/Printed Electronics

ñ     MEMS

ñ     VLSI Design and Implementation

ñ     Microcontroller and FPGA Implementation

ñ     Embedded Real-Time Operating Systems

ñ     Cloud Computing in Embedded System Development

ñ     Digital Filter Design

ñ     Digital Signal Processing and Applications

ñ     Image and Multidimensional Signal Processing

ñ     Embedded Systems in Multimedia and Communications

ñ     Consumer Electronics

ñ     Wearable and Mobile Healthcare, Well-being and Security

ñ     Emergency and Disaster Management

ñ     Identification and Supervision Systems

ñ     Industrial, Bio-Medical, Automotive and Avionic Systems

ñ     Embedded Robotics, Instrumentation and Measurement

ñ     Embedded Systems in Energy Efficiency

 

Venue: MECO’2016 will be held in Hotel Princess**** (http://www.hotelprincess.me) Bar (http://www.visit-montenegro.com/main-cities/bar/), Montenegro (http://www.visit-montenegro.com/). Bar is an amazing Mediterranean city with beautiful beaches and green areas. Besides being Montenegro’s main seaport, Bar and its surroundings are a popular tourist destination. The Bar municipality stretches to the southern shore of a Skadar lake of an extraordinary beauty, and encompasses Krajina region being excellent for leisure and hiking. Smaller settlements near Bar, with their long sandy beaches, are favorite destinations for sunbathing. Bar has many interesting touristic attractions like old town from the 15th century, castle of King Nikola, several churches, cathedrals and mosques, and the Old Olive Tree said to be one of the oldest olive trees in Europe and the world. Bar is well connected with European cities by sea, road, air and train.

 

Submission of papers: Prospective authors are invited to submit full-length, four-page papers, strictly according to the IEEE Conference Standards and viahttp://embeddedcomputing.me.

 

Conference quality: Conference content will be submitted for inclusion into IEEE Xplore, as well as, several other Abstracting and Indexing (A&I) databases. Currently MECO is covered by SCOPUS, Web of Science, Google Scholar, Research Gate etc. Several high-profile journals will publish extended versions of selected papers from ECYPS.

 

Accompanying events: MECO’2016 includes ECYPS’2016 – the 4th EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems(http://embeddedcomputing.me), and  will additionally host several accompanying Workshops/Sessions and distinguished student papers. Proposals of accompanying Workshops/Sessions should be submitted to Radovan Stojanović (stox@ac.me).

 

Important Deadlines:

February 07, 2016, Paper submission deadline

March 13, 2016, Acceptance/rejection notification

March 27, 2016, Final paper submission and author registration deadline

May 02, 2016, Registration deadline

 

Fees: The participation fees of MECO and ECYPS are low to encourage participation of young scientists and colleagues from developing countries.

 

Conference Chairs:

Radovan Stojanović, University of Montenego, Montenegro

Lech Jóźwiak, Eindhoven University of Technology, Netherlands

 

Scientific Committee:

Thanos Stouraitis, University of Patras, IEEE Fellow, Greece

Srdjan Stanković, University of Montenegro, Montenegro

Yervant Zorian. Synopsys, USA

Veljko Milutinović, University of Belgrade, IEEE Fellow, Serbia

Christos Koulamas, ISI, Patras, Greece

Ion Tutanescu, University of Pitesti, Romania

Milan Prokin, University of Belgrade, Serbia.

Andrej Skraba, University of Maribor, Slovenia

Dejan Karadaglić, Glasgow Caledonian University, UK

Cornel Ioana, INP Grenoble, France

Roberto Giorgi, University of Siena, Italy

Saso Kocevski, University of Stip, Macedonia

Betim Cico, Polytechnic University of Tirana, Albania

George Papadopoulos, University of Cyprus, Cyprus

Gerhard Rath, University of Leoben, Austria

Milan Stork, University of West Bohemia, Czech Republic

Emil Jovanov, University of Alabama, USA

Roman Bazylevych, Lviv Polytechnic Univ., Ukraine

Natasa Nesković, IEEE S&M Section, Serbia

Yury Bekhtin, Ryazan State Radio Eng. University, Russia

Sergey Vityazev, Ryazan State Radio Eng. University, Russia

Ioannis Sourdis, Chalmers University, Sweden,

Jari Viik, Tampere University of Technology, Finland

Josep-Ramon Herrero, UPC, Spain

Adam Postula, University of Queensland, Australia

Bilgin Metin, Bogazici University, Turkey

Miroslav Hagara, STU, Slovakia

Anetta Caplanova, EUBA, Slovakia

Elissaveta Gourova, Sofia University, Bulgaria

Paris Kitsos, Hellenic Open University, Greece

Drazen Jurišić, University of Zagreb, Croatia

Almir Badnjević, University of Sarajevo, B&H

 

Local Organizing Committee:

Budimir Lutovac, University of Montenegro, Chair

Dmitry Tarasov, MANT, Montenegro, Co-Chair

Marko Kaludjerović, MANT Montenegro

CALL FOR WiP PAPERS AND DEMOS: RTAS 2016

[Our apologies if you receive multiple copies of this CfP]

—————————————-
CALL FOR WiP PAPERS AND DEMOS: RTAS 2016
—————————————-

The 22nd IEEE Rea​l-Time and Embedded Technology and Applications Symposium (RTAS 2016) will be held in Vienna, Austria, as part of the Cyber-Physical Systems Week (CPSWeek) in April 2016. The conference includes a Work in Progress (WiP) and Demo session intended for presentation of recent and on-going work, as well as for demonstrations of tools and technology that have the potential to be used in the design and development of real-time systems. In keeping with the spirit of the main symposium, we invite submissions of WiP papers and demos with an emphasis on system and application aspects. Authors of accepted WiP/demo papers are expected to give a brief presentation to the RTAS’16 audience followed by a poster/demo presentation at the reception held on April 11, 2016.

Web site: http://2016.rtas.org/

WORK IN PROGRESS SESSION
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The WiP session at RTAS 2016 is dedicated to new and on-going research in the field of real-time and embedded systems. Authors are invited to submit short papers describing ongoing, unpublished work in all areas of real-time and embedded technology, including applications, systems, tools, methodologies, foundations, wireless sensor networks, and hardware-software co-design. The WiP session provides researchers and developers with an opportunity to discuss evolving and early-stage ideas, and to solicit feedback from the real-time systems community at large.

DEMO SESSION
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The demo session at RTAS 2016 will provide a forum for researchers to give a demonstration of their work with concrete systems, tools and prototypes in all areas of real-time embedded technology and applications as part of the CPS Week joint poster/demo session. Authors are invited to submit short technical abstracts (up to 2 pages) describing what will be demonstrated and how the contributions will be illustrated interactively. Authors of papers accepted at RTAS’16 are welcome to propose a demo of their work.

IMPORTANT DATES
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Abstract and short paper submission deadline (FIRM) – Jan 9, 2016 at 23:59 GMT-12
Acceptance notification – Jan 18, 2016
Final version (abstracts) – Jan 22, 2016
Final version (papers) – Feb 5, 2016
WiP/Demo session – Apr 11, 2016

Please note that the submission deadline is a firm deadline and will not be extended.

TOPICS OF INTEREST
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Topics of particular interest include, but are not limited to:
– Applications and case studies
– Runtime environment, OS, and middleware
– Adaptive systems
– Analysis, simulation, and debugging tools
– Cloud and distributed computing
– Composition and component-based systems
– Computer architectures and microprocessors
– Execution-time analysis (static, measurement-based, and probabilistic)
– Formal methods
– Hardware/software co-design
– Many-core systems
– Multi-criticality systems
– Multicore and GPU computing
– Power-, thermal-, and energy-aware computing
– Programming languages and compilers
– Real-time databases
– Scheduling and schedulability analysis
– SoCs, FPGAs, and reconfigurable systems
– Software engineering
– Storage systems
– Synchronization
– System synthesis and optimization
– Testing, validation, and certification
– Virtualization and isolation
– Wireless communications

SUBMISSION OF PAPERS
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This year, every author is required to submit two separate documents:

1. An abstract that will appear in the main proceedings. These abstracts must include a conventional header with the title of the WiP/demo paper and the names and affiliations of the authors. The header must be followed by approximately 300 words (i.e. about half a page) that summarize in one or two paragraphs the research context and the specificity of the solution that will be presented/demonstrated. To avoid doubling up the references and skewing the citation count, it is extremely important to note that these abstracts must *not* contain references nor acknowledgments! All references and acknowledgements will be removed from the document before its publication in the main proceedings.

2. A short paper that will be made available online and at the conference.

– WiP papers should consist of 2 to 4 pages in the IEEE 10-point, two-column conference format, including all references and appendices. The submitted paper must be original material that has neither been previously published nor is currently under review by another conference or journal, and will not be submitted elsewhere before notification by RTAS 2016. Submissions will be refereed for quality and relevance. Submissions that fail to comply with the formatting requirements will not be reviewed.

– Demo papers should adhere to the IEEE 10-point, two-column conference format, and be 1 to 2 pages long, including all references and appendices. They should repeat and extend the information provided in the abstract. In addition, they must clearly describe what will be demonstrated and how the contributions will be illustrated interactively. If a demonstration requires special arrangements (in addition to a table, power, and wireless connectivity), please describe them clearly in the paper. Submissions will be evaluated based on technical merit and innovation as well as the potential to stimulate interesting discussions and exchange of ideas at the conference.

Abstracts and short papers must be submitted electronically in PDF.

By submitting a paper, the authors agree and confirm that, in case of acceptance, at least one author will register for the conference and present the WiP/demo in person. Instructions for preparing the final version of accepted WiP/demo papers and their presentation will be sent along with the notification.

WORK-IN-PROGRESS CHAIR
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Vincent Nelis, CISTER/INESC TEC and ISEP, Portugal

WORK-IN-PROGRESS PROGRAM COMMITTEE
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Borislav Nikolic, CISTER/INESC TEC and ISEP, Portugal
Björn Brandenburg, Max Planck Institute for Software Systems, Germany
David Bol, Microelectronics laboratory – ICTEAM institute, Université catholique de Louvain, Belgium
Benny Akesson, CISTER/INESC TEC and ISEP, Portugal
Leandro Indrusiak, University of York, U.K.
Andrea Marongiu, Integrated Systems Laboratory, ETH, Swiss
Paolo Burgio, University of Modena, Italy
Dakshina Dasari Research and Technology Centre at Robert Bosch, India
Gurulingesh Raravi, Distributed and Mobile Computing group in Xerox Research Center India
Mircea Negrean, IAV GmbH, Germany

DEMO CHAIR
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Sophie Quinton, Inria Grenoble Rhône-Alpes, France

DEMO PROGRAM COMMITTEE
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Luís Almeida, University of Porto, Portugal
Loïc Fejoz, RealTime-at-Work, France
Daniel Lohmann, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany
Martina Maggio, Lund University, Sweden
Gabriel Parmer, George Washington University, USA
Insik Shin, KAIST, Korea
Marcus Völp, University of Luxemburg, Luxemburg
Dirk Ziegenbein, Bosch GmbH, Germany


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Sophie Quinton
INRIA Grenoble – Rhône-Alpes
655 Avenue de l’Europe – Montbonnot
38334 St Ismier Cedex – FRANCE
tel: +33 4 76 61 55 31
https://team.inria.fr/spades/quinton/
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4th EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems

ECYPS’2016

4th EUROMICRO/IEEE Workshop on

Embedded and Cyber-Physical Systems

Bar • Montenegro • June 12-16, 2016

http://embeddedcomputing.me

 

Call for Papers

 

ECYPS’2016 – the 4th EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems will be held in the scope ofMECO’2016 – the 5th Mediterranean Conference on Embedded Computing. It is devoted to cyber-physical systems (CPS) for modern applications that usually require high-performance, low energy consumption, high safety, security and reliability. It addresses the specification, validation, architectures, technology, hardware, software, design methodology and EDA tools for such systems. Its target participants are academic researchers and teachers, industrial researchers, developers and decision-makers, and Ph.D. students. It gives an excellent opportunity to disseminate fresh research results from European, international and other R&D projects. The topics of main interest include the following:

ñ advanced applications and case studies of systems in consumer appliances,  healthcare, personal assistance, environmental and safety monitoring, industrial and leaving-space automation, transportation, automotive, aerospace, aviation, energy generation,  communications, tele-operation,  control, robotics, infrastructure, etc.

ñ mobile, autonomous, wearable and implantable systems

ñ application (software) modeling, analysis, parallelization and mapping for high-performance and low-energy computing

ñ multi-domain modeling, analysis, synthesis, simulation, integration and validation of heterogeneous systems

ñ multi-objective and multi-domain optimization and co-design of heterogeneous systems

ñ MPSoCs, sensors, actuators, MEMS, their integration and packaging

ñ sensor-based (distributed, networked) monitoring and control

ñ sub-system arrangement and communication in complex heterogeneous (3D) systems

ñ safety, security and reliability of complex heterogeneous systems

 

Venue: ECYPS’2016 will be held in Hotel Princess**** (http://www.hotelprincess.me) Bar (http://www.visit-montenegro.com/main-cities/bar/), Montenegro (http://www.visit-montenegro.com/). Bar is an amazing Mediterranean city with beautiful beaches and green areas. Besides being Montenegro’s main seaport, Bar and its surroundings are a popular tourist destination. The Bar municipality stretches to the southern shore of a Skadar lake of an extraordinary beauty, and encompasses Krajina region being excellent for leisure and hiking. Smaller settlements near Bar, with their long sandy beaches, are favorite destinations for sunbathing. Bar has many interesting touristic attractions like old town from the 15th century, castle of King Nikola, several churches, cathedrals and mosques, and the Old Olive Tree said to be one of the oldest olive trees in Europe and the world. Bar is well connected with European cities by sea, road, air and train.

 

Submission of papers: Prospective authors are invited to submit full-length, four-page papers, strictly according to the IEEE Conference Standards and viahttp://embeddedcomputing.me.

 

Conference quality: Conference content will be submitted for inclusion into IEEE Xplore, as well as, several other Abstracting and Indexing (A&I) databases. Currently ECYPS is covered by SCOPUS, Web of Science, Google Scholar, Research Gate etc. Several high-profile journals will publish extended versions of selected papers from ECYPS.

 

Accompanying events: MECO’2016 and ECYPS’2016 are twin events that will additionally host several accompanying Workshops/Sessions and distinguished student papers. Proposals of accompanying Workshops/Sessions should be submitted to Radovan Stojanović (stox@ac.me).

 

Important Deadlines:

February 07, 2016, Paper submission deadline

March 13, 2016, Acceptance/rejection notification

March 27, 2016, Final paper submission and author registration deadline

May 02, 2016, Registration deadline

 

Fees: The participation fees of MECO and ECYPS are low to encourage participation of young scientists and colleagues from developing countries.

 

Conference Chairs:

Lech Jóźwiak, Eindhoven University of Technology, Netherlands

Radovan Stojanović, University of Montenego, Montenegro

 

Scientific Committee:

Koen Bertels, Delft University of Technology, Netherlands

Victor Goulart,Kyushu University, Japan

Yervant Zorian. Synopsys, USA

Miguel Figueroa, Univesity of Concepcion, Chile

Erwin Grosspietsch, Euromicro, Germany

Ilker Hamzaoglu, Sabanci University, Turkey

Lech Jóźwiak, Eindhoven University of Technology, Netherlands

Paris Kitsos, Open Hellenic University, Patras, Greece

Akash Kumar, National Univ. Singapore, Singapore

Francesco Leporati, University of Pavia, Italy

Menno Lindwer, Intel, Netherlands

Jan Madsen, Technical University of Denmark, Denmark

Veljko Milutinovic, University of Belgrade, Serbia

Nadia Nedjah, State University of Rio de Janeiro, Brazil

Smail Niar, University of Valenciennes, France

Horácio .C Neto, Technical University of Lisbon, Portugal

Alex Orailoglu, University of California at San Diego, USA

Sri Parameswaran, UNSW, Australia

Adam Postula, University of Queensland, Australia

Peter Puschner, Vienna Univ. of Technology, Austria

Davide Quaglia, University of Verona, Italy

Majid Sarrafzadeh, UCLA, California, USA

Radovan Stojanović, University of Montenegro, Montenegro

Ioannis Sourdis, Chalmers Univ. of Technology, Sweden

Alice M. Tokarnia, State University of Campinas, Brazil

Heinrich Vierhaus, Brandenburg Uni. of Technology, Germany

Eugenio Villar, University of Cantabria, Spain

Arda Yurdakul, Bogazici University, Turkey

 

Local Organizing Committee:

Budimir Lutovac, University of Montenegro, Chair

Dmitry Tarasov, MANT, Montenegro, Co-Chair

Marko Kaludjerović, MANT Montenegro