Call for Participation: Tutorial on “Computing-in-Memory (CIM) for Energy-Efficient AI Chips” by IEEE CAS Malaysia

Dear all IEEE members,

IEEE Circuits and Systems (CAS)  Malaysia Chapter are pleased to inform you that a tutorial on Computing-in-Memory (CIM) for Energy-Efficient AI Chips  will be organised as follows:

Date:  16 November 2018
Time: 9.00 am – 5.00 pm.
Venue: Dream Catcher Consulting Sdn. Bhd, Penang, Malaysia

Synopsis

Memory has proven a major bottleneck in the development of energy-efficient chips for IoT and artificial intelligence (AI) applications. Recent volatile and nonvolatile memory (NVM) devices not only serve as memory macros, but also enable the development of nonvolatile logics (nvLogics) and computing-in-memory (CIM) for IoT and AI chips. In this workshop, we will discuss the trend of IoT and AI chips and introduce the concept of memory-centric computing beyond von Neumann structure. The fundamental of memory circuits of SRAM and NVM (MRAM, ReRAM and PCM) will be introduced. Then, we will explore the recent progress and challenges in circuit designs, devices-circuits-interaction, software-hardware-interaction of CIMs for IoT and AI chips.

 What you will learn

  • AI chips
  • SRAM-based computing-in-memory
  • NVM-based computing-in-memory

Who Should Attend

R&D engineers/researchers involved in memory IC or AI chips designs.

Course Structure

  1. Introduction of computing-in-memory (CIM) and AI chips
  • Challenges and Trend of AI Chips
  • Concept of computing-in-memory (CIM)
  • Future AI chips for servers
  • Future AI chips for edge devices (nvLogic + CIM)
  1. SRAM-based computing-in-memory
  • Fundamental of SRAM circuits designs
  • Pattern-matching SRAM – TCAM
  • SRAM-based CIM
  • Software-hardware interaction for SRAM-based CIM for DNN
  1. NVM-based computing-in-memory
  • Recent development of nonvolatile memory (NVM) devices (PCM, ReRAM, STT-MRAM)
  • Basic circuits of NVM (read and write)
  • NVM-based CIM
  • Device-Circuit interaction for NVM-based CIM
  • Software-hardware interaction for NVM-based CIM

Course Instructors : Prof Dr Meng-Fan (Marvin) Chang

Prof Chang is a full Professor in the Dept. of Electrical Engineering of National Tsing Hua University (NTHU), Taiwan. Prof Chang obtained considerable practical industrial experience before joining NTHU in 2006, having spent more than 10 years working in semiconductor
i n d u s t r y.

Between 1997 and 2006, Prof Chang worked in the development of SRAM/ROM/flash macros/compilers at Mentor Graphics (New Jersey, US), TSMC (Taiwan), and the Intellectual Property Library Company (Taiwan). His research interests include circuit design for volatile and nonvolatile memory, 3D-memory, nonvolatile and spintronics logics, circuit-device- interactions in non-CMOS devices, memristor circuits, computing-in-memory and neuromorphic circuits for deep learning and artificial intelligent (AI) chips.

Since 2010, Prof Chang has authored and co-authored more than 40 top conference papers (including 14 ISSCC, 15 VLSI Symposia, 8 IEDM, and 5 DAC) as well as 40+ IEEE journal papers and 40+ US patents. He is an associate editor for IEEE TVLSI, and IEEE TCAD. He has been serving on technical program committees for ISSCC, IEDM (Executive committee, Chair of MT sub-committee), DAC, A-SSCC, IEEE CAS Society (Chair Elect of NG-TC), and numerous international conferences. He is a Distinguished Lecturer for IEEE Circuits and Systems Society (CASS) during 2017-2018. He is the recipient of several prestigious national-level awards in Taiwan, including the Outstanding Research Award of MOST-Taiwan, Outstanding Electrical Engineering Professor Award, Ta-You Wu Memorial Award, and Academia Sinica Junior Research Investigators Award.

Registration Fee

  • Regular Fee : RM1,400.00
  • Early Bird Discount : before 19th Oct 2018  : RM 1,275.00
  • Group Discount : For every 3 pax registered, receive 1 complimentary seat

**Additional cost may incur for customization or extra material request. Course fee is 100% claimable from PSMB (SBL scheme) in accordance to PSMB guidelines.

Program Logistics 

Morning break, lunch and tea break will be provided throughout the course duration. Course Manual and Certificate of Attendance will be provided.

3 Easy Steps to Register

Phone +604 640 7111 / 7112
Fax registration form to +604 640 7110
Email registration form to register@dreamcatcher.asia

Registration deadline: 2 Nov 2018

 

Please refer to attached brochure for more detailed information.

Don’t miss your chance! See you there.

Regards

Haslina Jaafar

Secretary

IEEE Circuits and Systems (CAS) Malaysia Chapter

Dept. of Electrical & Electronic Eng,

Faculty of Engineering

Universiti Putra Malaysia

43400 Serdang, Selangor.

+60389464374